Comparison experiment of Parasitic Inductance Extraction of power module based on ANSYS Q3D software

Abstract

SiC power devices are widely used in high frequency and high voltage circuits because of their excellent properties such as high breakdown field strength and high thermal conductivity. However, their packaging and loop stray inductance affect the work of the devices seriously in high frequency and high voltage environment seriously. The main effects are switching oscillation, EMI, additional power loss and equipment stress. In this paper, the parallel SiC Power Module (SKM200GB12F4SiC3) is analyzed by using ANSYS Q3D software. Based on the two port scattering (S) parameter's test method, the parasitic inductance of each port is extracted and compared with the experimental results. The influence of the physical structure on the parasitic inductance of SiC Power module is analyzed. By comparing the experimental data with the simulation data, it is concluded that the parasitic inductance of the grid of the lower half bridge is more than twice as much as that of the upper half bridge, which is the maximum of all parasitic inductance parameters. It is the main factor affecting the parasitic parameters. The method to improve the parasitic parameters of the module is given.