Efficient interleaver design for MIMO-OFDM based communication systems on FPGA

Abstract

In this paper, we present a memory-efficient and faster interleaver implementation technique for MIMO-OFDM communication systems on FPGA. The IEEE 802.16 standard is used as a reference for simulation, implementation, and analysis. A method for the interleaver design on FPGA and its memory utilization results are presented. Our design utilizes the minimum required on-chip memory for the interleaver implementation. Using the proposed interleaver design method, the data rates for MIMO-OFDM based communication systems are doubled for 2×2 MIMO systems without using the transmit diversity.