Variation Investigation of Junction-less Transistor with Side-wall Charge-plasma Structure Induced by Line Edge Roughness

Kai Liu, Hung-Chih Chin, H. Lou, Kuan‐Chang Chang, Xinnan Lin
{"title":"Variation Investigation of Junction-less Transistor with Side-wall Charge-plasma Structure Induced by Line Edge Roughness","authors":"Kai Liu, Hung-Chih Chin, H. Lou, Kuan‐Chang Chang, Xinnan Lin","doi":"10.1109/ICSICT49897.2020.9278349","DOIUrl":null,"url":null,"abstract":"In this work, the fluctuations of the electrical characteristics including ON -current, OFF -current, subthreshold swing and threshold voltage, due to line edge roughness (LER) for double-gate charge-plasma junctionless transistor (CPJLT) and side-wall charge-plasma junctionless transistor (S-CPJLT) are explored. Results shows that S-CPJLT has less fluctuations in ON -current while maintaining similar performance of other electrical characteristics. Besides, S-CPJLT has larger ON-current, smaller OFF-current on average. This work indicates that S-CPJLT has greater potential in electronic device development.","PeriodicalId":6727,"journal":{"name":"2020 IEEE 15th International Conference on Solid-State & Integrated Circuit Technology (ICSICT)","volume":"38 1","pages":"1-3"},"PeriodicalIF":0.0000,"publicationDate":"2020-11-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 IEEE 15th International Conference on Solid-State & Integrated Circuit Technology (ICSICT)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICSICT49897.2020.9278349","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
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Abstract

In this work, the fluctuations of the electrical characteristics including ON -current, OFF -current, subthreshold swing and threshold voltage, due to line edge roughness (LER) for double-gate charge-plasma junctionless transistor (CPJLT) and side-wall charge-plasma junctionless transistor (S-CPJLT) are explored. Results shows that S-CPJLT has less fluctuations in ON -current while maintaining similar performance of other electrical characteristics. Besides, S-CPJLT has larger ON-current, smaller OFF-current on average. This work indicates that S-CPJLT has greater potential in electronic device development.
线边缘粗糙度诱导无结边壁电荷等离子体结构晶体管的变化研究
本文研究了双栅极电荷等离子体无结晶体管(CPJLT)和侧壁电荷等离子体无结晶体管(S-CPJLT)的线边缘粗糙度对导通电流、关断电流、亚阈值摆幅和阈值电压等电特性的影响。结果表明,S-CPJLT在保持其他电特性性能的同时,导通电流波动较小。S-CPJLT的on电流大,off电流小。这表明S-CPJLT在电子器件开发中具有更大的潜力。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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