Establishing Thermal Air-cooled Limit for High Performance Electronics Devices

G. Refai-Ahmed, Hoa Do, Yaser Hadad, S. Rangarajan, B. Sammakia, V. Gektin, T. Cader
{"title":"Establishing Thermal Air-cooled Limit for High Performance Electronics Devices","authors":"G. Refai-Ahmed, Hoa Do, Yaser Hadad, S. Rangarajan, B. Sammakia, V. Gektin, T. Cader","doi":"10.1109/EPTC50525.2020.9315139","DOIUrl":null,"url":null,"abstract":"This manuscript explores the design and optimization of an air-cooled heat sink and establishes thermal performance limits for the air-cooling of high power electronic devices. The air-cooling limit is established based on a numerical model. This model correlates the thermal performance of an FPGA with the test data from a standalone active VCK5000 PCIe card. Using Ansys Icepak V19.1 software, a series of CFD (computational fluid dynamics) simulations is performed with an FPGA power level of 1,000W, which is recently discussed in different roadmap such as HIR [1]. The purpose of the CFD model is to determine the temperature and flow fields over a range of airflow rates, and to develop a correlation for the convective thermal resistance, as a function of the flow parameters. A heat sink shape optimization is performed by simple Brute force in order to minimize the pressure drop and die maximum case temperature. The effects of the heat sink's fin thickness and channel spacing are analyzed numerically. The optimization is performed for the constant values of air velocity and chip power. The optimized air-cooled heat sink with a vapor chamber base using a thermal interface material (TIM) with an effective thermal conductivity of 20W/mK and effective thickness of 70um is shown to able to operate at a heat flux 45-55W/cm2 for either 1U or 4U server, while still meeting max allowable FPGA operating case temperature.","PeriodicalId":6790,"journal":{"name":"2020 IEEE 22nd Electronics Packaging Technology Conference (EPTC)","volume":"18 1","pages":"347-354"},"PeriodicalIF":0.0000,"publicationDate":"2020-12-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 IEEE 22nd Electronics Packaging Technology Conference (EPTC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EPTC50525.2020.9315139","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 6

Abstract

This manuscript explores the design and optimization of an air-cooled heat sink and establishes thermal performance limits for the air-cooling of high power electronic devices. The air-cooling limit is established based on a numerical model. This model correlates the thermal performance of an FPGA with the test data from a standalone active VCK5000 PCIe card. Using Ansys Icepak V19.1 software, a series of CFD (computational fluid dynamics) simulations is performed with an FPGA power level of 1,000W, which is recently discussed in different roadmap such as HIR [1]. The purpose of the CFD model is to determine the temperature and flow fields over a range of airflow rates, and to develop a correlation for the convective thermal resistance, as a function of the flow parameters. A heat sink shape optimization is performed by simple Brute force in order to minimize the pressure drop and die maximum case temperature. The effects of the heat sink's fin thickness and channel spacing are analyzed numerically. The optimization is performed for the constant values of air velocity and chip power. The optimized air-cooled heat sink with a vapor chamber base using a thermal interface material (TIM) with an effective thermal conductivity of 20W/mK and effective thickness of 70um is shown to able to operate at a heat flux 45-55W/cm2 for either 1U or 4U server, while still meeting max allowable FPGA operating case temperature.
建立高性能电子器件的热风冷极限
本文探讨了风冷散热器的设计和优化,并为大功率电子器件的风冷建立了热性能限制。根据数值模型建立了风冷极限。该模型将FPGA的热性能与来自独立有源VCK5000 PCIe卡的测试数据相关联。利用Ansys Icepak V19.1软件,在FPGA功率水平为1000w的情况下进行了一系列CFD(计算流体动力学)仿真,最近在HIR等不同路线图中进行了讨论[1]。CFD模型的目的是确定一定气流速率范围内的温度和流场,并建立对流热阻与流动参数的关系。通过简单的蛮力优化散热器形状,以最小化压降和模具的最高温度。数值分析了散热器翅片厚度和通道间距对散热性能的影响。在风速和芯片功率恒定的情况下进行了优化。优化后的气冷散热器采用热界面材料(TIM),其有效导热系数为20W/mK,有效厚度为70um,对于1U或4U服务器,能够在45-55W/cm2的热流密度下工作,同时仍然满足FPGA最大允许工作温度。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:604180095
Book学术官方微信