Conversion of Logic Gates in Netlists for Rapid Single Flux Quantum Circuits Utilizing Confluence of Pulses

Abstract

A conversion method of a netlist consisting of conventional logic gates for superconducting rapid single flux quantum (RSFQ) circuit realization is proposed. The method detects OR gates which can be replaced with confluence buffers (CBs) which converge their input pulses into their outputs. The detection problem of replaceable OR gates is treated as a SAT problem. Each OR gate requires clock input in RSFQ circuits. By replacing OR gates with CBs, wiring for clocking those OR gates are eliminated and the number of active devices known as Josephson junctions is reduced.