K. Chabak, D. Walker, A. Green, A. Crespo, M. Lindquist, K. Leedy, S. Tetlak, R. Gilbert, N. Moser, G. Jessen
{"title":"Sub-Micron Gallium Oxide Radio Frequency Field-Effect Transistors","authors":"K. Chabak, D. Walker, A. Green, A. Crespo, M. Lindquist, K. Leedy, S. Tetlak, R. Gilbert, N. Moser, G. Jessen","doi":"10.1109/IMWS-AMP.2018.8457153","DOIUrl":null,"url":null,"abstract":"Beta-gallium oxide (BGO) radio frequency device performance is presented using sub-micron T-shaped gates. In the first design, a gate-recess is implemented to allow gate and channel device scaling which results in $\\text{f}_{\\mathbf {t}} {/\\mathbf {f}} _{\\mathbf {max}} \\quad =$ 3/13 GHz at $\\text{V}_{\\mathbf {DS}} \\quad =$ 40 V. The second approach uses a thin and higher doped channel with a T-gate formed by electron beam lithography. An $\\text{f}_{\\mathbf {t}} {/\\mathbf {f}} _{\\mathbf {max}} \\quad =$ 5/17 GHz is measured at ${V}_{DS} =$ 15 V and is the highest reported for BGO transistors. Significant gains in RF performance are expected with reduction of device parasitics and vertically scaled epitaxial designs.","PeriodicalId":6605,"journal":{"name":"2018 IEEE MTT-S International Microwave Workshop Series on Advanced Materials and Processes for RF and THz Applications (IMWS-AMP)","volume":"45 1","pages":"1-3"},"PeriodicalIF":0.0000,"publicationDate":"2018-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"29","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 IEEE MTT-S International Microwave Workshop Series on Advanced Materials and Processes for RF and THz Applications (IMWS-AMP)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IMWS-AMP.2018.8457153","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 29
Abstract
Beta-gallium oxide (BGO) radio frequency device performance is presented using sub-micron T-shaped gates. In the first design, a gate-recess is implemented to allow gate and channel device scaling which results in $\text{f}_{\mathbf {t}} {/\mathbf {f}} _{\mathbf {max}} \quad =$ 3/13 GHz at $\text{V}_{\mathbf {DS}} \quad =$ 40 V. The second approach uses a thin and higher doped channel with a T-gate formed by electron beam lithography. An $\text{f}_{\mathbf {t}} {/\mathbf {f}} _{\mathbf {max}} \quad =$ 5/17 GHz is measured at ${V}_{DS} =$ 15 V and is the highest reported for BGO transistors. Significant gains in RF performance are expected with reduction of device parasitics and vertically scaled epitaxial designs.