An 8-bit 300MS/s Switched-Current Pipeline ADC in 0.18µm CMOS

B. Sedighi, M. S. Bakhtiar
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引用次数: 3

Abstract

In this paper, capabilities of switched-current (SI) circuits are utilized to design a high-speed A/D converter. New methods to improve the performance of the SI circuits are introduced. An 8-bit 300MS/s pipeline ADC is design in 0.18um CMOS technology and an ENOB of 7.3b is obtained from simulations. The ADC consumes 40mW from a 1.8V supply.
一个8位300MS/s开关电流流水线ADC在0.18µm CMOS
本文利用开关电流(SI)电路的特性设计了一种高速a /D转换器。介绍了提高SI电路性能的新方法。采用0.18um CMOS技术设计了一个8位300MS/s的流水线ADC,仿真得到了73 b的ENOB。ADC从1.8V电源消耗40mW。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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