Hole mobility enhancement in extremely-thin-body strained GOI and SGOI pMOSFETs by improved Ge condensation method

K. Jo, W. Kim, M. Takenaka, S. Takagi
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引用次数: 3

Abstract

We demonstrate high performance extremely-thin-body (ETB) Ge-on-insulator (GOI) and SiGe-on-insulator (SGOI) pMOSFETs with the body thickness ranging from 10 to 2 nm by applying the improved Ge condensation process with slow cooling to initial substrates with thinner SiGe layers. When we employ Si/40-nm-thin Si0.75Ge0.25/SOI structures as starting substrates for Ge condensation, the high compressive strain of ~1.75% is maintained in GOI, leading to the operation of 10-nm-thick GOI pMOSFETs with hole mobility (µh) of 467 cm2/Vs. Furthermore, by thinning the fabricated GOI and SGOI films, we demonstrate the operation of ETB GOI and SGOI pMOSFETs with the body thickness down to 2 nm without losing high compressive strain. Comparing with the reported results, the record-high µh is obtained in GOI pMOSFETs in the GOI thickness ranging from 10 to 2 nm.
改进Ge凝聚法增强极薄体应变GOI和SGOI pmosfet的空穴迁移率
我们展示了高性能极薄体(ETB)绝缘体上锗(GOI)和绝缘体上锗(SGOI) pmosfet,其体厚范围为10至2 nm,通过将改进的锗冷凝工艺与缓慢冷却应用于具有较薄SiGe层的初始衬底。当我们采用Si/40-nm-thin Si0.75Ge0.25/SOI结构作为Ge冷凝的起始衬底时,GOI中保持了~1.75%的高压缩应变,导致10-nm厚GOI pmosfet的空穴迁移率(µh)为467 cm2/Vs。此外,通过稀释制备的GOI和SGOI薄膜,我们证明了ETB GOI和SGOI pmosfet的运行,其体厚降至2 nm而不损失高压应变。与已报道的结果相比,在GOI厚度为10 ~ 2 nm的GOI pmosfet中获得了创纪录的µh。
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