M. Aoki, H. Takato, S. Samata, M. Numano, A. Yagishita, K. Hieda, A. Nitayama, F. Horiguchi
{"title":"Quarter-micron selective-epitaxial-silicon refilled trench (SRT) isolation technology with substrate shield","authors":"M. Aoki, H. Takato, S. Samata, M. Numano, A. Yagishita, K. Hieda, A. Nitayama, F. Horiguchi","doi":"10.1109/IEDM.1991.235359","DOIUrl":null,"url":null,"abstract":"In order to realize high-density and stress-free field isolation for future ULSIs, the authors propose a selective-epitaxial-silicon refilled trench (SRT) isolation. The SRT isolation structure consists of a thin insulator film on the trench sidewalls, a selective-epitaxial-growth (SEG) silicon layer refilling the trench, and a capping oxide covering the trench openings. By using this isolation, the number of isolation process steps can be reduced to 60% of the number for a conventional process, and the stress induced by the thermal process can be minimal. The authors have succeeded in fabricating a 0.2- mu m isolation structure and have confirmed its excellent characteristics.<<ETX>>","PeriodicalId":13885,"journal":{"name":"International Electron Devices Meeting 1991 [Technical Digest]","volume":"8 1","pages":"447-450"},"PeriodicalIF":0.0000,"publicationDate":"1991-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"International Electron Devices Meeting 1991 [Technical Digest]","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEDM.1991.235359","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
In order to realize high-density and stress-free field isolation for future ULSIs, the authors propose a selective-epitaxial-silicon refilled trench (SRT) isolation. The SRT isolation structure consists of a thin insulator film on the trench sidewalls, a selective-epitaxial-growth (SEG) silicon layer refilling the trench, and a capping oxide covering the trench openings. By using this isolation, the number of isolation process steps can be reduced to 60% of the number for a conventional process, and the stress induced by the thermal process can be minimal. The authors have succeeded in fabricating a 0.2- mu m isolation structure and have confirmed its excellent characteristics.<>