III–V 4D transistors

Jiangjiang Gu, Xinwei Wang, J. Shao, A. Neal, M. Manfra, Roy G. Gordon, P. D. Ye
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Abstract

We fabricated for the first time vertically and laterally integrated III-V 4D transistors. III-V gate-all-around (GAA) nanowire MOSFETs with 3×4 arrays show high drive current of 1.35mA/μm and high transconductance of 0.85mS/μm. The vertical stacking of the III-V nanowires have provided an elegant solution to the drivability bottleneck of nanowire devices and is promising for future low-power logic and RF application.
III-V - 4D晶体管
我们首次制作了垂直和横向集成的III-V 4D晶体管。采用3×4阵列的III-V栅极全能(GAA)纳米线mosfet具有1.35mA/μm的高驱动电流和0.85mS/μm的高跨导性。III-V纳米线的垂直堆叠为纳米线器件的可驱动性瓶颈提供了一个优雅的解决方案,并有望在未来的低功耗逻辑和射频应用中得到应用。
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