Reliability Study of Large Fan-Out BGA Solution on FinFET Process

C.K. Yu, W. S. Chiang, P.S. Huang, M. Z. Lin, Y.H. Fang, M. J. Lin, C. Peng, B. Lin, Michael Huang
{"title":"Reliability Study of Large Fan-Out BGA Solution on FinFET Process","authors":"C.K. Yu, W. S. Chiang, P.S. Huang, M. Z. Lin, Y.H. Fang, M. J. Lin, C. Peng, B. Lin, Michael Huang","doi":"10.1109/ECTC.2018.00245","DOIUrl":null,"url":null,"abstract":"Driven by aggressive product roadmap of high performance and low power IC, the complexity of both design and interconnection has significantly increased for field requirements. Unlike single-die FCBGA area limitation (generally within 600 mm2), fan-out technology significantly extends the die scale far beyond and largely improves both SI and PI requirements. To name a few, networking product is one of the specific applications; wired-ASIC would be another. However, fan-out structure inherently exhibits weaker mechanical properties due to its substrate-less process. As a consequence, study on the high latent risk of chip-to-package interaction (CPI) becomes important for the success of this technology. In this work, the reliability of CPI was experimentally investigated at 16nm FinFET process node on a large scale die size (~860mm2) and FOBGA package size (67.5mm*67.5mm). The result shows no CPI induced defect was found owing to specific RDL pattern was designed. Also the heat spreader type (including ring, lid, and without spreader) were studied, and the result shows that the stiffener ring could help on reducing overall package warpage by 20% as compared with the one without ring. And the lid type heat spreader having highest stiffness performed the best warpage behavior. Furthermore, it was revealed that optimizing ring type spreader width effectively reduces the deformation variation in the temperature range from 25 °C to 150 °C. Moreover, the board level reliability, including temperature cycling and drop tests, for the FOBGA was evaluated experimentally with daisy-chain PCB. Despite the low risk exhibited by board-level mechanical stress tests, e.g. shock and monotonic bend tests, on die bump and fan-out RDL, the BGA ball lifetime seemed to be inevitably getting worse under thermal gradient stress (temperature cycling). This was majorly due to the warpage behavior induced by large package size. It has been well known that PCB design variation causes dynamic and fatigue failure discrepancies. In this paper, through-hole design (Cu plating or Cu paste filling) and core material were studied on the effects of PCB design variants on board level thermal stress. The result shows the PCB with high Tg core or with Cu-paste filled through hole, has much better temperature cycling reliability than the one with Cu-plated-through-hole PCB. And there was no failure which relevant to CPI issue was found even after 2500-cycle TCT. Moreover, the board level dropping results reveal that the large FOBGA passed the drop test.","PeriodicalId":6555,"journal":{"name":"2018 IEEE 68th Electronic Components and Technology Conference (ECTC)","volume":"9 1","pages":"1623-1627"},"PeriodicalIF":0.0000,"publicationDate":"2018-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 IEEE 68th Electronic Components and Technology Conference (ECTC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ECTC.2018.00245","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4

Abstract

Driven by aggressive product roadmap of high performance and low power IC, the complexity of both design and interconnection has significantly increased for field requirements. Unlike single-die FCBGA area limitation (generally within 600 mm2), fan-out technology significantly extends the die scale far beyond and largely improves both SI and PI requirements. To name a few, networking product is one of the specific applications; wired-ASIC would be another. However, fan-out structure inherently exhibits weaker mechanical properties due to its substrate-less process. As a consequence, study on the high latent risk of chip-to-package interaction (CPI) becomes important for the success of this technology. In this work, the reliability of CPI was experimentally investigated at 16nm FinFET process node on a large scale die size (~860mm2) and FOBGA package size (67.5mm*67.5mm). The result shows no CPI induced defect was found owing to specific RDL pattern was designed. Also the heat spreader type (including ring, lid, and without spreader) were studied, and the result shows that the stiffener ring could help on reducing overall package warpage by 20% as compared with the one without ring. And the lid type heat spreader having highest stiffness performed the best warpage behavior. Furthermore, it was revealed that optimizing ring type spreader width effectively reduces the deformation variation in the temperature range from 25 °C to 150 °C. Moreover, the board level reliability, including temperature cycling and drop tests, for the FOBGA was evaluated experimentally with daisy-chain PCB. Despite the low risk exhibited by board-level mechanical stress tests, e.g. shock and monotonic bend tests, on die bump and fan-out RDL, the BGA ball lifetime seemed to be inevitably getting worse under thermal gradient stress (temperature cycling). This was majorly due to the warpage behavior induced by large package size. It has been well known that PCB design variation causes dynamic and fatigue failure discrepancies. In this paper, through-hole design (Cu plating or Cu paste filling) and core material were studied on the effects of PCB design variants on board level thermal stress. The result shows the PCB with high Tg core or with Cu-paste filled through hole, has much better temperature cycling reliability than the one with Cu-plated-through-hole PCB. And there was no failure which relevant to CPI issue was found even after 2500-cycle TCT. Moreover, the board level dropping results reveal that the large FOBGA passed the drop test.
基于FinFET工艺的大扇出BGA方案可靠性研究
在高性能和低功耗集成电路的积极产品路线图的推动下,设计和互连的复杂性大大增加,以满足现场需求。与单芯片FCBGA面积限制(通常在600 mm2以内)不同,扇出技术大大扩展了芯片规模,并大大提高了SI和PI要求。举几个例子,网络产品就是其中一个具体的应用;有线asic将是另一个。然而,扇形结构由于其无衬底工艺而固有地表现出较弱的力学性能。因此,研究芯片与封装相互作用(CPI)的高潜在风险对该技术的成功至关重要。本文在16nm FinFET制程节点上,以大规模晶片尺寸(~860mm2)和FOBGA封装尺寸(67.5mm*67.5mm)对CPI的可靠性进行了实验研究。结果表明,由于设计了特定的RDL模式,没有发现CPI诱导缺陷。研究了不同类型的扩热器(包括环形、盖型和不带环形),结果表明,与不带环形的扩热器相比,加强型扩热器可使整机翘曲量减少20%。具有最高刚度的盖式散热器具有最佳的翘曲性能。在25℃~ 150℃的温度范围内,优化环式铺布宽度可以有效地减小变形变化。此外,在雏菊链PCB上对FOBGA的板级可靠性进行了实验评估,包括温度循环和跌落测试。尽管板级机械应力测试(例如冲击和单调弯曲测试)在模具碰撞和扇形RDL上显示出较低的风险,但在热梯度应力(温度循环)下,BGA球的寿命似乎不可避免地变差。这主要是由于大包装尺寸引起的翘曲行为。众所周知,PCB设计变化会导致动态失效和疲劳失效差异。本文研究了通孔设计(镀铜或填充铜膏)和芯材设计对板级热应力的影响。结果表明,采用高Tg芯或铜膏填充通孔的PCB比镀铜通孔的PCB具有更好的温度循环可靠性。经过2500次TCT后,没有发现与CPI问题相关的故障。此外,板级跌落结果表明,大型FOBGA通过了跌落测试。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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