S. Moench, M. Costa, A. Barner, I. Kallfass, R. Reiner, B. Weiss, P. Waltereit, R. Quay, O. Ambacher
{"title":"Monolithic integrated quasi-normally-off gate driver and 600 V GaN-on-Si HEMT","authors":"S. Moench, M. Costa, A. Barner, I. Kallfass, R. Reiner, B. Weiss, P. Waltereit, R. Quay, O. Ambacher","doi":"10.1109/WIPDA.2015.7369264","DOIUrl":null,"url":null,"abstract":"This work reports on a 600 V GaN-on-Si power transistor with monolithic integrated gate driver. The circuit is based on Schottky-gate depletion-mode technology and fabricated on a 2×3 mm2 chip. The push-pull gate driver stage implements a quasi-normally-off pull-up transistor, fabricated with monolithic integrated series-connected Schottky diodes for positive voltage-level shifting in the source path of a d-mode HEMT. The measured gate-source threshold voltage of the fabricated quasi-normally-off pull-up transistor is +2.7 V as compared to -2.9 V of the normally-on pull-down transistor. Pulsed-IV measurements determine an effective gate driver resistance of around 2 Ω. On-wafer measurements of the power transistor show low off-state leakage-currents up to 600 V blocking voltage with high wafer yield and 150 mΩ on-resistance. Finally, inductive-load switching measurements up to 450 V, 14.3 A show maximum switch node slew-rates during turn-on and turn-off transitions as high as 250 V/ns.","PeriodicalId":6538,"journal":{"name":"2015 IEEE 3rd Workshop on Wide Bandgap Power Devices and Applications (WiPDA)","volume":"47 1","pages":"92-97"},"PeriodicalIF":0.0000,"publicationDate":"2015-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"25","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 IEEE 3rd Workshop on Wide Bandgap Power Devices and Applications (WiPDA)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/WIPDA.2015.7369264","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 25
Abstract
This work reports on a 600 V GaN-on-Si power transistor with monolithic integrated gate driver. The circuit is based on Schottky-gate depletion-mode technology and fabricated on a 2×3 mm2 chip. The push-pull gate driver stage implements a quasi-normally-off pull-up transistor, fabricated with monolithic integrated series-connected Schottky diodes for positive voltage-level shifting in the source path of a d-mode HEMT. The measured gate-source threshold voltage of the fabricated quasi-normally-off pull-up transistor is +2.7 V as compared to -2.9 V of the normally-on pull-down transistor. Pulsed-IV measurements determine an effective gate driver resistance of around 2 Ω. On-wafer measurements of the power transistor show low off-state leakage-currents up to 600 V blocking voltage with high wafer yield and 150 mΩ on-resistance. Finally, inductive-load switching measurements up to 450 V, 14.3 A show maximum switch node slew-rates during turn-on and turn-off transitions as high as 250 V/ns.