Soh Siew Boon, H. Wee, Simon Lim Siak Boon, Sharon Lim Pei Siang, R. Singh, S. Raju
{"title":"Fan-Out Packaging with Thin-film Inductors","authors":"Soh Siew Boon, H. Wee, Simon Lim Siak Boon, Sharon Lim Pei Siang, R. Singh, S. Raju","doi":"10.1109/EPTC50525.2020.9315018","DOIUrl":null,"url":null,"abstract":"Fan-out Wafer Level Packaging is widely and commonly adopted to ease implementation for low-cost packaging. It offers an enhanced solution of standard wafer-level packaging (WLP), which gained popularity for its application in embedding integrated circuitry into smaller packaging approaches. This development involves the study of voltage regulators using an integrated thin-film inductor technology with a laminated magnetic core. Voltage regulators are essential devices in microprocessors, systems-on-chip, and other electronic components to maintain the consistency in the desired operating voltage for the circuits. The inductors and regulators can be co-optimized for achieving good electrical performance. For demonstrating the FOWLP integration of the voltage regulator, the thin-film inductors are embedded into a Fan-out package along with the CMOS controller ASIC. The packaging solution targets to provide high-efficiency power conversion. The electrical characterization results indicated that the low-loss inductor with a peak quality factor of 21 is useful in high-efficiency power conversion.","PeriodicalId":6790,"journal":{"name":"2020 IEEE 22nd Electronics Packaging Technology Conference (EPTC)","volume":"77 1","pages":"449-452"},"PeriodicalIF":0.0000,"publicationDate":"2020-12-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 IEEE 22nd Electronics Packaging Technology Conference (EPTC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EPTC50525.2020.9315018","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
Fan-out Wafer Level Packaging is widely and commonly adopted to ease implementation for low-cost packaging. It offers an enhanced solution of standard wafer-level packaging (WLP), which gained popularity for its application in embedding integrated circuitry into smaller packaging approaches. This development involves the study of voltage regulators using an integrated thin-film inductor technology with a laminated magnetic core. Voltage regulators are essential devices in microprocessors, systems-on-chip, and other electronic components to maintain the consistency in the desired operating voltage for the circuits. The inductors and regulators can be co-optimized for achieving good electrical performance. For demonstrating the FOWLP integration of the voltage regulator, the thin-film inductors are embedded into a Fan-out package along with the CMOS controller ASIC. The packaging solution targets to provide high-efficiency power conversion. The electrical characterization results indicated that the low-loss inductor with a peak quality factor of 21 is useful in high-efficiency power conversion.