A Novel Self-Aligned Dopant-Segregated Schottky Tunnel-FET with Asymmetry Sidewall Based on Standard CMOS Technology

Abstract

A novel Si-based tunnel field effect transistor (TFET) with self-aligned dopant-segregated Schottky (DSS) source and underlap-drain is proposed and manufactured based on standard CMOS process. Asymmetric sidewall structures are introduced and manufactured for the process of self-aligned DSS source/drain. In the proposed device, DSS structure is able to optimize the source junction of devices without introducing ambipolar effect. The fabricated device improves the on-current by about two orders of magnitude compared with the conventional TFET without DSS structure, and suppress the ambipolar current over two orders of magnitude compared with the DSS-TFET without asymmetric sidewall structures. The experimental results demonstrate the great potential of the device for ultra-low power IOT applications.