The Pivotal Role of Uniformity of Electrolytic Deposition Processes to Improve the Reliability of Advanced Packaging

Ralf Schmidt, Jens Palm, J. Knaup
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Abstract

Heterogeneous integration is considered as the key technology to create large, complex System in Package (SiP) assemblies of separately manufactured, smaller components. Proper control of the uniformity of each process step constitutes one of the main challenges during integration of the different components into a higher-level assembly. In this context, processes that create thick layers by electrochemical deposition are especially susceptible to variations across the substrate. Such processes include copper pillar and bump as well as tin-silver applications. Insufficient coplanarity of electrolytic copper would result in significant reliability issues or evolution of stress in the package. Upcoming hybrid bump designs with features of different dimensions pose additional challenges to the electrolytic copper and tin-silver processes. Purposeful adjustment of differences between the heights of pillars of different diameters may be required after the copper process step in order to obtain the best uniformity for the complete stack with tin-silver on top. In addition to coplanarity, the electrolytic process should allow modification shape of the individual pillar or bump. In this context, a versatile copper electrodeposition process will be discussed that allows adjustment to a broad variety of uniformity parameters and combinations thereof. In combination with suitable tin-silver deposition processes, this process is expected to significantly improve the reliability of copper pillars and bumps for advanced packaging applications.
电解沉积工艺均匀性对提高先进封装可靠性的关键作用
异构集成被认为是创建大型、复杂的系统封装(SiP)组件的关键技术,这些组件是由单独制造的较小的组件组成的。在将不同组件集成到更高级别的装配中,对每个工艺步骤的均匀性的适当控制构成了主要挑战之一。在这种情况下,通过电化学沉积产生厚层的工艺特别容易受到衬底变化的影响。这些工艺包括铜柱和凸块以及锡银应用。电解铜的共面性不足将导致严重的可靠性问题或封装中应力的演变。即将到来的具有不同尺寸特征的混合凸点设计对电解铜和锡银工艺提出了额外的挑战。在铜工艺步骤后,可能需要有目的地调整不同直径柱的高度差异,以获得顶部有锡银的整个堆的最佳均匀性。除了共面性外,电解过程还应允许修改单个支柱或凸起的形状。在这种情况下,将讨论一种通用的铜电沉积工艺,该工艺允许调整各种均匀性参数及其组合。结合合适的锡银沉积工艺,该工艺有望显著提高铜柱和凸点的可靠性,用于先进的封装应用。
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