M. Aoyagi, F. Imura, F. Kato, K. Kikuchi, N. Watanabe, M. Suzuki, H. Nakagawa, Y. Okada, T. Yokoshima, Y. Yamaji, S. Nemoto, T. Bui, S. Melamed
{"title":"Developing a leading practical application for 3D IC chip stacking technology","authors":"M. Aoyagi, F. Imura, F. Kato, K. Kikuchi, N. Watanabe, M. Suzuki, H. Nakagawa, Y. Okada, T. Yokoshima, Y. Yamaji, S. Nemoto, T. Bui, S. Melamed","doi":"10.5571/SYNTHENG.9.1_1","DOIUrl":null,"url":null,"abstract":"−1− Synthesiology English edition Vol.9 No.1 pp.1-15 (Jun. 2016) IC technologies, and the attempt to increase the integration density seemed to face the limit. The three-dimensional IC chip stacking technology whereby the IC devices are stacked vertically and packaged is one of the solutions, and expectation for it is rising recently as a technology for semiconductor device stacking that enables the increase of integration density for semiconductor ICs. Therefore, we established the fundamental technology for high-density high-integration electronic hardware construction required for 3D IC chip stacking, and we are working on the R&D of the application phase to create the flow of application system development, while engaging in technical support of massproduction technology that, in practice, should be undertaken by leading companies.","PeriodicalId":39206,"journal":{"name":"Synthesiology","volume":"9 1","pages":"1-15"},"PeriodicalIF":0.0000,"publicationDate":"2016-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.5571/SYNTHENG.9.1_1","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Synthesiology","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.5571/SYNTHENG.9.1_1","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q4","JCRName":"Social Sciences","Score":null,"Total":0}
引用次数: 1
Abstract
−1− Synthesiology English edition Vol.9 No.1 pp.1-15 (Jun. 2016) IC technologies, and the attempt to increase the integration density seemed to face the limit. The three-dimensional IC chip stacking technology whereby the IC devices are stacked vertically and packaged is one of the solutions, and expectation for it is rising recently as a technology for semiconductor device stacking that enables the increase of integration density for semiconductor ICs. Therefore, we established the fundamental technology for high-density high-integration electronic hardware construction required for 3D IC chip stacking, and we are working on the R&D of the application phase to create the flow of application system development, while engaging in technical support of massproduction technology that, in practice, should be undertaken by leading companies.
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