IEEE Open Journal of the Solid-State Circuits Society Special Section on Custom Circuits and Architectures for Energy-Efficient Machine Learning

Jae-Sun Seo
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Abstract

Machine learning (ML) and artificial intelligence (AI) have been successful in many practical applications, e.g., image/speech/video recognition, object detection/tracking, natural language processing, etc. To efficiently execute such AI/ML algorithms, there have been large advances in custom hardware accelerator designs, such as digital systolic arrays of processing engines (PEs), and analog or digital circuits for in-/near-memory computing for deep neural networks (DNNs) [1] , [2] .
IEEE固态电路学会开放期刊关于节能机器学习的定制电路和架构的专刊
机器学习(ML)和人工智能(AI)在许多实际应用中都取得了成功,例如图像/语音/视频识别、对象检测/跟踪、自然语言处理等。为了有效地执行这种AI/ML算法,在定制硬件加速器设计方面取得了巨大进步,例如处理引擎的数字收缩阵列(PE),以及用于深度神经网络(DNN)的内存内/近内存计算的模拟或数字电路[1]、[2]。
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