VCO Design and Simulation Using TSMC 0.18 m Process to Meet IEEE802.11a Requirements

Q4 Engineering

Majlesi Journal of Electrical Engineering Pub Date : 2009-09-06 DOI:10.1234/MJEE.V2I2.56

A. Daghighi, AliReza Neshat-Niko

引用次数: 2

Abstract

A complimentary topology is used incorporating TSMC 0.18 m m process to design a CMOS VCO with the center frequency of 5.4 GHz. Simulation results showed tuning range of 13%. The phase noise at 1 MHz offset was measured to be -118.7 dBc/Hz. The VCO core power consumption was 3.3 mW when the power supply voltage was set to 1.5 V. Simulation results verified that the designed structure meets the IEEE802.11a requirements.

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基于TSMC 0.18 m工艺满足IEEE802.11a要求的VCO设计与仿真

采用互补拓扑，结合台积电0.18 m工艺，设计了中心频率为5.4 GHz的CMOS压控振荡器。仿真结果表明，调谐范围为13%。测量到1mhz偏移时的相位噪声为-118.7 dBc/Hz。当电源电压设置为1.5 V时，VCO核心功耗为3.3 mW。仿真结果验证了所设计的结构满足IEEE802.11a的要求。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

Majlesi Journal of Electrical Engineering Engineering-Electrical and Electronic Engineering

CiteScore

1.20

自引率

0.00%

发文量

期刊介绍： The scope of Majlesi Journal of Electrcial Engineering (MJEE) is ranging from mathematical foundation to practical engineering design in all areas of electrical engineering. The editorial board is international and original unpublished papers are welcome from throughout the world. The journal is devoted primarily to research papers, but very high quality survey and tutorial papers are also published. There is no publication charge for the authors.