Application Mapping Onto Mesh-Based Network-on-Chip Using Discrete Particle Swarm Optimization

IF 2.8 2区工程技术 Q2 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE

IEEE Transactions on Very Large Scale Integration (VLSI) Systems Pub Date : 2014-02-01 DOI:10.1109/TVLSI.2013.2240708

P. Sahu, Tapan Shah, K. Manna, S. Chattopadhyay

引用次数: 107

Abstract

This paper presents a discrete particle swarm optimization (PSO)-based strategy to map applications on both 2-D and 3-D mesh-connected Networks-on-Chip. The basic PSO formulation has been augmented by: 1) running multiple PSOs and 2) deterministically generating a part of the initial population for PSO. The mapping results, in terms of the overall communication metric, have been compared with well-known techniques reported in the literature and also with exact methods built around integer linear programming (ILP). Our PSO-based results are superior to those from reported techniques. For smaller benchmarks, the results obtained are same as those corresponding to the ILP formulation, establishing the quality of the solution strategy.

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基于离散粒子群优化的基于网格的片上网络应用映射

本文提出了一种基于离散粒子群优化(PSO)的二维和三维网格连接片上网络应用映射策略。基本的PSO公式已被增强:1)运行多个PSO和2)确定性地生成PSO初始种群的一部分。就整体通信度量而言，映射结果已与文献中报道的知名技术以及围绕整数线性规划(ILP)构建的精确方法进行了比较。我们基于pso的结果优于那些报道的技术。对于较小的基准，获得的结果与ILP公式对应的结果相同，从而建立了解决方案策略的质量。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

IEEE Transactions on Very Large Scale Integration (VLSI) Systems 工程技术-工程：电子与电气

CiteScore

6.40

自引率

7.10%

发文量

187

审稿时长

3.6 months

期刊介绍： The IEEE Transactions on VLSI Systems is published as a monthly journal under the co-sponsorship of the IEEE Circuits and Systems Society, the IEEE Computer Society, and the IEEE Solid-State Circuits Society. Design and realization of microelectronic systems using VLSI/ULSI technologies require close collaboration among scientists and engineers in the fields of systems architecture, logic and circuit design, chips and wafer fabrication, packaging, testing and systems applications. Generation of specifications, design and verification must be performed at all abstraction levels, including the system, register-transfer, logic, circuit, transistor and process levels. To address this critical area through a common forum, the IEEE Transactions on VLSI Systems have been founded. The editorial board, consisting of international experts, invites original papers which emphasize and merit the novel systems integration aspects of microelectronic systems including interactions among systems design and partitioning, logic and memory design, digital and analog circuit design, layout synthesis, CAD tools, chips and wafer fabrication, testing and packaging, and systems level qualification. Thus, the coverage of these Transactions will focus on VLSI/ULSI microelectronic systems integration.