Novel multiplexer circuit design in quantum-dot cellular automata technology

IF 2.9 4区 计算机科学 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC
Abdalhossein Rezai , Davood Aliakbari , Asghar Karimi
{"title":"Novel multiplexer circuit design in quantum-dot cellular automata technology","authors":"Abdalhossein Rezai ,&nbsp;Davood Aliakbari ,&nbsp;Asghar Karimi","doi":"10.1016/j.nancom.2023.100435","DOIUrl":null,"url":null,"abstract":"<div><p><span><span>The QCA<span> technology is a strong contender for replacing CMOS technology in the design of nanoscale<span> digital circuits. The goal of this paper’s design is to increase the performance of the </span></span></span>multiplexer (MUX) circuit. The design strategy is using a cost-effective architecture and path-planning design, which can reduce design costs. This paper presents an efficient circuit for 2-to-1 QCA MUX. Then, two circuits including 4-to-1 and 8-to-1 QCA MUX circuits are developed using this 2-to-1 QCA MUX circuit. The functionality of these circuits is investigated using QCADesigner tool version 2.0.3. The designed 2-to-1 QCA MUX circuit has 0.5 clock cycles delay, </span><span><math><mrow><mn>0</mn><mo>.</mo><mn>01</mn><mspace></mspace><mi>μ</mi><mi>m</mi></mrow></math></span><sup>2</sup> area and 15 cells. Moreover, the suggested 4-to-1 (8-to-1) QCA MUX circuit has 53 (163) cells, 0.06 (0.18) <span><math><mi>μ</mi></math></span>m<sup>2</sup><span> area and 1 (3.75) clock cycles delay. The energy dissipation (Area-delay cost) of the proposed 2-to-1, 4-to-1, and 8-to-1 MUX at 1</span><span><math><msup><mrow></mrow><mrow><mi>o</mi></mrow></msup></math></span>K is 8.91 mev (0.04), 17.9 mev (0.96), and 39.3 mev (8.82), respectively. The comparison results demonstrate that the designed circuits provide benefits compared to other MUX circuits.</p></div>","PeriodicalId":54336,"journal":{"name":"Nano Communication Networks","volume":"35 ","pages":"Article 100435"},"PeriodicalIF":2.9000,"publicationDate":"2023-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Nano Communication Networks","FirstCategoryId":"94","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S1878778923000017","RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 3

Abstract

The QCA technology is a strong contender for replacing CMOS technology in the design of nanoscale digital circuits. The goal of this paper’s design is to increase the performance of the multiplexer (MUX) circuit. The design strategy is using a cost-effective architecture and path-planning design, which can reduce design costs. This paper presents an efficient circuit for 2-to-1 QCA MUX. Then, two circuits including 4-to-1 and 8-to-1 QCA MUX circuits are developed using this 2-to-1 QCA MUX circuit. The functionality of these circuits is investigated using QCADesigner tool version 2.0.3. The designed 2-to-1 QCA MUX circuit has 0.5 clock cycles delay, 0.01μm2 area and 15 cells. Moreover, the suggested 4-to-1 (8-to-1) QCA MUX circuit has 53 (163) cells, 0.06 (0.18) μm2 area and 1 (3.75) clock cycles delay. The energy dissipation (Area-delay cost) of the proposed 2-to-1, 4-to-1, and 8-to-1 MUX at 1oK is 8.91 mev (0.04), 17.9 mev (0.96), and 39.3 mev (8.82), respectively. The comparison results demonstrate that the designed circuits provide benefits compared to other MUX circuits.

量子点元胞自动机技术中新型多路复用器电路设计
QCA技术是在纳米级数字电路设计中取代CMOS技术的有力竞争者。本文设计的目标是提高多路复用器(MUX)电路的性能。设计策略是使用具有成本效益的架构和路径规划设计,这可以降低设计成本。本文提出了一种用于2对1 QCA多路复用器的高效电路。然后,使用该2对1 QCA MUX电路开发了包括4对1和8对1 QCA-MUX电路的两个电路。使用QCADesigner工具2.0.3版对这些电路的功能进行了研究。所设计的2对1 QCA MUX电路具有0.5个时钟周期的延迟、0.01μm2的面积和15个单元。此外,所提出的4对1(8对1)QCA MUX电路具有53(163)个单元、0.06(0.18)μm2的面积和1(3.75)个时钟周期的延迟。所提出的2比1、4比1和8比1 MUX在1oK时的能量耗散(面积延迟成本)分别为8.91mev(0.04)、17.9mev(0.96)和39.3mev(8.82)。比较结果表明,与其他MUX电路相比,所设计的电路具有优势。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
Nano Communication Networks
Nano Communication Networks Mathematics-Applied Mathematics
CiteScore
6.00
自引率
6.90%
发文量
14
期刊介绍: The Nano Communication Networks Journal is an international, archival and multi-disciplinary journal providing a publication vehicle for complete coverage of all topics of interest to those involved in all aspects of nanoscale communication and networking. Theoretical research contributions presenting new techniques, concepts or analyses; applied contributions reporting on experiences and experiments; and tutorial and survey manuscripts are published. Nano Communication Networks is a part of the COMNET (Computer Networks) family of journals within Elsevier. The family of journals covers all aspects of networking except nanonetworking, which is the scope of this journal.
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信