Research on mapping recognition of arc welding molten pool characterisation and penetration state based on embedded system

IF 1.1 4区计算机科学 Q4 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE

IET Computers and Digital Techniques Pub Date : 2023-06-27 DOI:10.1049/cdt2.12055

Yanjun Zhu, Zhisheng Wu, Cuirong Liu

{"title":"Research on mapping recognition of arc welding molten pool characterisation and penetration state based on embedded system","authors":"Yanjun Zhu, Zhisheng Wu, Cuirong Liu","doi":"10.1049/cdt2.12055","DOIUrl":null,"url":null,"abstract":"<p>In order to explore the mapping recognition of arc welding molten pool characterisation and penetration state, according to the idea of embedded system construction, this article adopts the idea of software and hardware co-design to find the zero-crossing point of the second derivative in welding image edge detection, and give a threshold. When the absolute value of the first-order derivative exceeds the threshold and has a different sign with the first-order derivative of the previous edge, it is judged as a valid edge. The welding current adopts a symmetrical pulsed AC square wave, and the proportion of heat flow input is high. At the base current, the arc light is darker, so a clear image is obtained. This article designs a simulation experiment to verify the effect of the embedded system in this article. From the experimental research, it can be known that the embedded system constructed in this article can play a certain role in the mapping recognition of the arc welding molten pool characterisation and penetration state.</p>","PeriodicalId":50383,"journal":{"name":"IET Computers and Digital Techniques","volume":"17 3-4","pages":"100-110"},"PeriodicalIF":1.1000,"publicationDate":"2023-06-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://onlinelibrary.wiley.com/doi/epdf/10.1049/cdt2.12055","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IET Computers and Digital Techniques","FirstCategoryId":"94","ListUrlMain":"https://onlinelibrary.wiley.com/doi/10.1049/cdt2.12055","RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q4","JCRName":"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE","Score":null,"Total":0}

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Abstract

In order to explore the mapping recognition of arc welding molten pool characterisation and penetration state, according to the idea of embedded system construction, this article adopts the idea of software and hardware co-design to find the zero-crossing point of the second derivative in welding image edge detection, and give a threshold. When the absolute value of the first-order derivative exceeds the threshold and has a different sign with the first-order derivative of the previous edge, it is judged as a valid edge. The welding current adopts a symmetrical pulsed AC square wave, and the proportion of heat flow input is high. At the base current, the arc light is darker, so a clear image is obtained. This article designs a simulation experiment to verify the effect of the embedded system in this article. From the experimental research, it can be known that the embedded system constructed in this article can play a certain role in the mapping recognition of the arc welding molten pool characterisation and penetration state.

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基于嵌入式系统的弧焊熔池特征及熔透状态映射识别研究

为了探索弧焊熔池特征和熔透状态的映射识别，本文根据嵌入式系统构建的思想，采用软硬件协同设计的思想，在焊接图像边缘检测中找到二阶导数的过零点，并给出阈值。当一阶导数的绝对值超过阈值并且与前一边缘的一阶导数具有不同的符号时，它被判断为有效边缘。焊接电流采用对称脉冲交流方波，热流输入比例高。在基极电流下，弧光较暗，因此可以获得清晰的图像。本文设计了一个仿真实验来验证本文中嵌入式系统的效果。通过实验研究可知，本文构建的嵌入式系统可以在弧焊熔池特征和熔透状态的映射识别中发挥一定作用。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

IET Computers and Digital Techniques 工程技术-计算机：理论方法

CiteScore

3.50

自引率

0.00%

发文量

审稿时长

>12 weeks

期刊介绍： IET Computers & Digital Techniques publishes technical papers describing recent research and development work in all aspects of digital system-on-chip design and test of electronic and embedded systems, including the development of design automation tools (methodologies, algorithms and architectures). Papers based on the problems associated with the scaling down of CMOS technology are particularly welcome. It is aimed at researchers, engineers and educators in the fields of computer and digital systems design and test. The key subject areas of interest are: Design Methods and Tools: CAD/EDA tools, hardware description languages, high-level and architectural synthesis, hardware/software co-design, platform-based design, 3D stacking and circuit design, system on-chip architectures and IP cores, embedded systems, logic synthesis, low-power design and power optimisation. Simulation, Test and Validation: electrical and timing simulation, simulation based verification, hardware/software co-simulation and validation, mixed-domain technology modelling and simulation, post-silicon validation, power analysis and estimation, interconnect modelling and signal integrity analysis, hardware trust and security, design-for-testability, embedded core testing, system-on-chip testing, on-line testing, automatic test generation and delay testing, low-power testing, reliability, fault modelling and fault tolerance. Processor and System Architectures: many-core systems, general-purpose and application specific processors, computational arithmetic for DSP applications, arithmetic and logic units, cache memories, memory management, co-processors and accelerators, systems and networks on chip, embedded cores, platforms, multiprocessors, distributed systems, communication protocols and low-power issues. Configurable Computing: embedded cores, FPGAs, rapid prototyping, adaptive computing, evolvable and statically and dynamically reconfigurable and reprogrammable systems, reconfigurable hardware. Design for variability, power and aging: design methods for variability, power and aging aware design, memories, FPGAs, IP components, 3D stacking, energy harvesting. Case Studies: emerging applications, applications in industrial designs, and design frameworks.