NoHammer: Preventing Row Hammer With Last-Level Cache Management

IF 1.4 3区 计算机科学 Q4 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE
Seunghak Lee;Ki-Dong Kang;Gyeongseo Park;Nam Sung Kim;Daehoon Kim
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引用次数: 0

Abstract

Row Hammer (RH) is a circuit-level phenomenon where repetitive activation of a DRAM row causes bit-flips in adjacent rows. Prior studies that rely on extra refreshes to mitigate RH vulnerability demonstrate that bit-flips can be prevented effectively. However, its implementation is challenging due to the significant performance degradation and energy overhead caused by the additional extra refresh for the RH mitigation. To overcome challenges, some studies propose techniques to mitigate the RH attack without relying on extra refresh. These techniques include delaying the activation of an aggressor row for a certain amount of time or swapping an aggressor row with another row to isolate it from victim rows. Although such techniques do not require extra refreshes to mitigate RH, the activation delaying technique may result in high-performance degradation in false-positive cases, and the swapping technique requires high storage overheads to track swap information. We propose NoHammer , an efficient RH mitigation technique to prevent the bit-flips caused by the RH attack by utilizing Last-Level Cache (LLC) management. NoHammer temporarily extends the associativity of the cache set that is being targeted by utilizing another cache set as the extended set and keeps the cache lines of aggressor rows on the extended set under the eviction-based RH attack. Along with the modification of the LLC replacement policy, NoHammer ensures that the aggressor row's cache lines are not evicted from the LLC under the RH attack. In our evaluation, we demonstrate that NoHammer gives 6% higher performance than a baseline without any RH mitigation technique by replacing excessive cache misses caused by the RH attack with LLC hits through sophisticated LLC management, while requiring 45% less storage than prior proposals.
NoHammer:防止行锤与最后一级缓存管理
行锤(RH)是一种电路级现象,其中重复激活DRAM行导致相邻行的位翻转。先前的研究依赖于额外的刷新来减轻RH脆弱性,表明可以有效地防止比特翻转。然而,由于为缓解相对湿度而进行的额外刷新导致了显著的性能下降和能源开销,因此其实现具有挑战性。为了克服挑战,一些研究提出了在不依赖额外刷新的情况下减轻RH攻击的技术。这些技术包括延迟激活攻击行一段时间,或将攻击行与另一行交换以将其与受害者行隔离开来。虽然这些技术不需要额外的刷新来减轻RH,但激活延迟技术可能会导致假阳性情况下的高性能下降,并且交换技术需要高存储开销来跟踪交换信息。我们提出了NoHammer,一种有效的RH缓解技术,通过利用最后一级缓存(LLC)管理来防止由RH攻击引起的位翻转。NoHammer通过利用另一个缓存集作为扩展集来临时扩展缓存集的关联性,并在基于驱逐的RH攻击下将攻击者行的缓存行保留在扩展集上。随着对LLC替换策略的修改,NoHammer确保攻击者行的缓存行在RH攻击下不会从LLC中被驱逐。在我们的评估中,我们证明NoHammer在没有任何RH缓解技术的情况下,通过复杂的LLC管理将RH攻击导致的过多缓存丢失替换为LLC命中,从而比基线性能提高6%,同时所需的存储空间比之前的建议减少45%。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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来源期刊
IEEE Computer Architecture Letters
IEEE Computer Architecture Letters COMPUTER SCIENCE, HARDWARE & ARCHITECTURE-
CiteScore
4.60
自引率
4.30%
发文量
29
期刊介绍: IEEE Computer Architecture Letters is a rigorously peer-reviewed forum for publishing early, high-impact results in the areas of uni- and multiprocessor computer systems, computer architecture, microarchitecture, workload characterization, performance evaluation and simulation techniques, and power-aware computing. Submissions are welcomed on any topic in computer architecture, especially but not limited to: microprocessor and multiprocessor systems, microarchitecture and ILP processors, workload characterization, performance evaluation and simulation techniques, compiler-hardware and operating system-hardware interactions, interconnect architectures, memory and cache systems, power and thermal issues at the architecture level, I/O architectures and techniques, independent validation of previously published results, analysis of unsuccessful techniques, domain-specific processor architectures (e.g., embedded, graphics, network, etc.), real-time and high-availability architectures, reconfigurable systems.
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