{"title":"Slimmer CNNs Through Feature Approximation and Kernel Size Reduction","authors":"Dara Nagaraju;Nitin Chandrachoodan","doi":"10.1109/OJCAS.2023.3292109","DOIUrl":null,"url":null,"abstract":"Convolutional Neural Networks (CNNs) have been shown to achieve state of the art results on several image processing tasks such as classification, localization, and segmentation. Convolutional and fully connected layers form the building blocks of these networks. The convolution layers are responsible for the majority of the computations even though they have fewer parameters. As inference is used much more than training (which happens only once), it is important to reduce the computations of the network for this phase. This work presents a systematic procedure to trim CNNs by identifying the least important features in the convolution layers and replacing them either with approximations or kernels of reduced size. We also propose an algorithm to integrate the lower kernel approximation technique for a given accuracy budget. We show that using the linear approximation method can achieve a 15% – 80% savings with a median of 52% reduction while the lower kernel method can achieve 33% – 95% reduction with a median of 65% in the required number of computations with only a marginal 1% loss in accuracy across several benchmark datasets. We have also demonstrated the proposed methods on VGG-16 architecture for various datasets. On VGG-16 we have achieved 4.2% - 45% savings in MAC computations (with a median of 18.5%) with only a marginal 0.5% loss in accuracy. We also show how an existing hardware accelerator for DNNs (DianNao) can be modified with low added complexity to take advantage of the kernel approximations, and estimate the speedups that can be obtained in such a way on custom embedded hardware.","PeriodicalId":93442,"journal":{"name":"IEEE open journal of circuits and systems","volume":"4 ","pages":"188-202"},"PeriodicalIF":2.4000,"publicationDate":"2023-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/iel7/8784029/10019301/10173478.pdf","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE open journal of circuits and systems","FirstCategoryId":"1085","ListUrlMain":"https://ieeexplore.ieee.org/document/10173478/","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
Abstract
Convolutional Neural Networks (CNNs) have been shown to achieve state of the art results on several image processing tasks such as classification, localization, and segmentation. Convolutional and fully connected layers form the building blocks of these networks. The convolution layers are responsible for the majority of the computations even though they have fewer parameters. As inference is used much more than training (which happens only once), it is important to reduce the computations of the network for this phase. This work presents a systematic procedure to trim CNNs by identifying the least important features in the convolution layers and replacing them either with approximations or kernels of reduced size. We also propose an algorithm to integrate the lower kernel approximation technique for a given accuracy budget. We show that using the linear approximation method can achieve a 15% – 80% savings with a median of 52% reduction while the lower kernel method can achieve 33% – 95% reduction with a median of 65% in the required number of computations with only a marginal 1% loss in accuracy across several benchmark datasets. We have also demonstrated the proposed methods on VGG-16 architecture for various datasets. On VGG-16 we have achieved 4.2% - 45% savings in MAC computations (with a median of 18.5%) with only a marginal 0.5% loss in accuracy. We also show how an existing hardware accelerator for DNNs (DianNao) can be modified with low added complexity to take advantage of the kernel approximations, and estimate the speedups that can be obtained in such a way on custom embedded hardware.