Towards Improved Power Management in Cloud GPUs

IF 1.4 3区计算机科学 Q4 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE

IEEE Computer Architecture Letters Pub Date : 2023-03-22 DOI:10.1109/LCA.2023.3278652

Pratyush Patel;Zibo Gong;Syeda Rizvi;Esha Choukse;Pulkit Misra;Thomas Anderson;Akshitha Sriraman

引用次数: 4

Abstract

As modern server GPUs are increasingly power intensive, better power management mechanisms can significantly reduce the power consumption, capital costs, and carbon emissions in large cloud datacenters. This letter uses diverse datacenter workloads to study the power management capabilities of modern GPUs. We find that current GPU management mechanisms have limited compatibility and monitoring support under cloud virtualization. They have sub-optimal, imprecise, and non-intuitive implementations of Dynamic Voltage and Frequency Scaling (DVFS) and power capping. Consequently, efficient GPU power management is not widely deployed in clouds today. To address these issues, we make actionable recommendations for GPU vendors and researchers.

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改进云gpu的电源管理

随着现代服务器gpu的功耗越来越高，更好的电源管理机制可以显著降低大型云数据中心的功耗、资本成本和碳排放。本文使用不同的数据中心工作负载来研究现代gpu的电源管理功能。我们发现当前的GPU管理机制在云虚拟化下的兼容性和监控支持有限。它们在动态电压和频率缩放(DVFS)和功率封顶方面具有次优、不精确和非直观的实现。因此，高效的GPU电源管理在今天的云中并没有广泛部署。为了解决这些问题，我们为GPU供应商和研究人员提出了可行的建议。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

IEEE Computer Architecture Letters COMPUTER SCIENCE, HARDWARE & ARCHITECTURE-

CiteScore

4.60

自引率

4.30%

发文量

期刊介绍： IEEE Computer Architecture Letters is a rigorously peer-reviewed forum for publishing early, high-impact results in the areas of uni- and multiprocessor computer systems, computer architecture, microarchitecture, workload characterization, performance evaluation and simulation techniques, and power-aware computing. Submissions are welcomed on any topic in computer architecture, especially but not limited to: microprocessor and multiprocessor systems, microarchitecture and ILP processors, workload characterization, performance evaluation and simulation techniques, compiler-hardware and operating system-hardware interactions, interconnect architectures, memory and cache systems, power and thermal issues at the architecture level, I/O architectures and techniques, independent validation of previously published results, analysis of unsuccessful techniques, domain-specific processor architectures (e.g., embedded, graphics, network, etc.), real-time and high-availability architectures, reconfigurable systems.