Image Processing-Based Method of Evaluation of Stress from Grain Structures of Through Silicon Via (TSV)

Pub Date : 2023-07-22 DOI:10.1142/s0219467825500081
Mamvinder Sharma, Sudhakara Reddy Saripalli, A. Gupta, Pankaj Palta, D. Pandey
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Abstract

Visualization of material composition across numerous grains and complicated networks of grain boundaries using image processing techniques can reveal fresh insights into the material’s structural evolution and upcoming functional capabilities for a variety of applications. Three-dimensional integrated circuits (3D IC) are the most practical technology for increasing transistor density in future semiconductor applications. One of the key benefits of 3D IC is heterogeneous integration, which results in shorter interconnections due to vertical stacking. However, one of the most significant challenges in building higher-density microelectronics devices is the stress generated by material mismatches in the coefficient of thermal expansion (CTE). The purpose of this study is to analyze grain boundary migration caused by variations in strain energy density using image processing methods for 3D grain continuum modeling. Temperature changes in polycrystalline structures generate stresses and strain energy densities, which may be calculated using FEM software. Single crystal Cu’s anisotropic elastic properties are twisted to suit grain orientation in space and each grain is treated as a single crystal. Grain boundary speeds are calculated using a simple model that relates grain boundary mobility to variations in strain energy density on both sides of grain boundaries. Using the grain continuum model, researchers will be able to investigate the effect of thermally generated stresses on grain boundary motion caused by atomic flux driven by strain energy. Using finite-element modeling of the grain structure in a Through Silicon Via, the stress effect on grain boundaries caused by grain rotation due to CTE mismatch was investigated (TSV). The structure must be modeled using a scanning electron microscopes Electron Backscatter Diffraction (EBSD) image (SEM). Grain growth and subsequent grain boundary rotation can be performed using the appropriate extrapolation method to measure their influence on stress and, as a result, the TSV’s overall reliability.
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基于图像处理的硅通孔(TSV)晶粒结构应力评估方法
使用图像处理技术对众多晶粒和复杂晶界网络的材料组成进行可视化,可以揭示材料结构演变的新见解,以及各种应用即将具备的功能。三维集成电路(3DIC)是在未来半导体应用中提高晶体管密度的最实用的技术。3D IC的主要优点之一是异构集成,这会由于垂直堆叠而导致更短的互连。然而,在构建更高密度微电子器件时,最重大的挑战之一是由热膨胀系数(CTE)中的材料失配产生的应力。本研究的目的是利用图像处理方法对三维晶粒连续体建模,分析应变能密度变化引起的晶界迁移。多晶结构中的温度变化产生应力和应变能量密度,可以使用FEM软件计算。单晶Cu的各向异性弹性特性被扭曲以适应空间中的晶粒取向,并且每个晶粒都被视为单晶。晶界速度是使用一个简单的模型计算的,该模型将晶界迁移率与晶界两侧应变能量密度的变化联系起来。使用晶粒连续体模型,研究人员将能够研究热产生的应力对应变能驱动的原子通量引起的晶界运动的影响。通过对硅通孔中晶粒结构的有限元建模,研究了CTE失配引起的晶粒旋转对晶界的应力效应。该结构必须使用扫描电子显微镜电子背散射衍射(EBSD)图像(SEM)进行建模。晶粒生长和随后的晶界旋转可以使用适当的外推方法来测量它们对应力的影响,从而测量TSV的整体可靠性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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