Physical Insights on Current Dynamics of RESURF DeMOS Designed for High-Frequency CMOS Level Shifter Application

Abstract

This work investigates isothermal high-current dynamics of Drain-extended MOS (DeMOS) devices optimized for high-frequency switching applications. Gate charge optimized reduced-surface-field (RESURF) DeNMOS structures using surface-implant (P-Top) and split-gate (SG_NonSTI) have been compared with conventional DeNMOS (C_DeNMOS) to investigate the dynamics of parasitic BJT trigger and subsequent space charge modulation (SCM) under high current conditions. Comparative AC analysis at a different gate and drain bias shows quasi-saturation peaks responsible for space charge modulation under high current conditions in DeMOS devices. The transient analysis investigates the isothermal unclamped inductive switching (UIS) and reverse recovery behavior. The parasitic gate capacitances Cgg and Cgd are reduced in both P-Top and SG_NonSTI. With the lowest turn-off delay under very high current conditions in UIS simulations, SG_NonSTI shows the best switching reliability, while P-Top shows the best reverse recovery and transient switching delay performance. In addition, we have shown the application of proposed DeNMOS devices in designing a high-frequency CMOS level shifter circuit. Compared to C_DeNMOS, the highest operating frequency has increased for P-Top and SG_NonSTI DeNMOS structures by 40% and 35%, respectively.