Breaking the Speed-Power Tradeoffs in Broadband Circuits: Reviewing design techniques for transceivers up to 56 GHz

IF 2.3 Q3 NANOSCIENCE & NANOTECHNOLOGY

IEEE Nanotechnology Magazine Pub Date : 2022-06-01 DOI:10.1109/mnano.2022.3160770

B. Razavi

引用次数: 0

Abstract

The power consumption of broadband circuits used in wireline systems becomes increasingly more critical as higher speeds are sought. This article presents a number of design techniques that greatly relax the tradeoffs between the speed and power consumption of functions such as multiplexers (MUXs), frequency dividers, and equalizers. Examples include quadrature multiplexing, charge steering, and feedforward techniques. The concepts have been demonstrated in CMOS transceivers up to 56 GHz.

查看原文本刊更多论文

打破宽带电路中的速度-功率权衡:回顾高达56 GHz的收发器设计技术

随着追求更高的速度，有线系统中使用的宽带电路的功耗变得越来越关键。本文介绍了许多设计技术，这些技术极大地减轻了多路复用器(mux)、分频器和均衡器等功能的速度和功耗之间的权衡。例子包括正交多路复用、电荷控制和前馈技术。该概念已在高达56 GHz的CMOS收发器中得到验证。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

求助全文

约1分钟内获得全文求助全文

来源期刊

IEEE Nanotechnology Magazine NANOSCIENCE & NANOTECHNOLOGY-

CiteScore

2.90

自引率

6.20%

发文量

期刊介绍： IEEE Nanotechnology Magazine publishes peer-reviewed articles that present emerging trends and practices in industrial electronics product research and development, key insights, and tutorial surveys in the field of interest to the member societies of the IEEE Nanotechnology Council. IEEE Nanotechnology Magazine will be limited to the scope of the Nanotechnology Council, which supports the theory, design, and development of nanotechnology and its scientific, engineering, and industrial applications.