Efficient Selection and Placement of In-Package Decoupling Capacitors Using Matrix-Based Evolutionary Computation

IF 1.8 Q3 MATERIALS SCIENCE, MULTIDISCIPLINARY
Akash Jain;Heman Vaghasiya;Jai Narayan Tripathi
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引用次数: 6

Abstract

In the era of advanced nanotechnology where billions of transistors are fabricated in a single chip, high-speed operations are challenging due to packaging related issues. In High-Speed Very Large Scale Integration (VLSI) systems, decoupling capacitors are essentially used in power delivery networks to reduce power supply noise and to maintain a low impedance of the power delivery networks. In this paper, the cumulative impedance of a power delivery network is reduced below the target impedance by using state-of-the-art metaheuristic algorithms to choose and place decoupling capacitors optimally. A Matrix-based Evolutionary Computing (MEC) approach is used for efficient usage of metaheuristic algorithms. Two case studies are presented on a practical system to demonstrate the proposed approach. A comparative analysis of the performance of state-of-the-art metaheuristics is presented with the insights of practical implementation. The consistency of results in both the case studies confirms the validity of the proposed appraoch.
基于矩阵进化计算的封装内去耦电容器的有效选择与放置
在先进的纳米技术时代,数十亿个晶体管被制造在一个芯片上,由于封装相关的问题,高速操作是具有挑战性的。在高速超大规模集成电路(VLSI)系统中,去耦电容器主要用于供电网络,以降低供电噪声并保持供电网络的低阻抗。本文采用最先进的元启发式算法对解耦电容进行优化选择和放置,使输电网的累计阻抗降至目标阻抗以下。采用基于矩阵的进化计算(MEC)方法来有效地使用元启发式算法。在一个实际系统上给出了两个案例研究来证明所提出的方法。对最先进的元启发式性能进行比较分析,并提出了实际实施的见解。两个案例研究结果的一致性证实了所提出方法的有效性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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来源期刊
CiteScore
3.90
自引率
17.60%
发文量
10
审稿时长
12 weeks
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