A 3.2 Gb/s SPAD-Based Multi-Channel QRNG Chip with Low-Optical-Power Operation via Rolling-Sampling Temporal Decorrelation.

Abstract

Random numbers play a vital role in modern information security, where quantum random number generators (QRNGs) based on single-photon avalanche diodes (SPADs) offer a promising physical platform for quantum random-number generation. However, practical SPAD QRNGs can exhibit temporal correlation arising from finite photon-event statistics and detector nonidealities. To overcome these limitations, this paper presents a high-speed, 256-channel SPAD QRNG chip, featuring a 256 × 512-pixel array integrated with a rolling-sampling time-division multiplexing architecture. By virtue of the rolling-sampling mechanism, the single-pixel sampling interval is extended to 40.96 μs, which substantially reduces the measured temporal correlation by increasing the per-pixel revisit interval while preserving aggregate throughput. Within one complete operating cycle, the chip generates 256 random bits simultaneously, achieving a maximum aggregate raw output bitrate of 3.2 Gb/s without digital post-processing. An FPGA-based test platform was constructed for experimental verification. Measurements demonstrate that under standard indoor illumination (8 W/m²), the generated raw bitstreams pass all 15 NIST SP 800-22 statistical randomness tests at 3.2 Gb/s without post-processing. Furthermore, under controlled 530 nm illumination, the measured lag-1 serial autocorrelation coefficient decreases below the 10^-3 reference level at an incident optical power of 11.6 μW. The proposed chip offers a low-optical-power, high-throughput solution for integrated hardware security.