Exploiting Decompression Latency for Covert Channels in Inter-Line-Compressed LLCs

Abstract

The recently proposed XOR cache is an inter-line-compressed last-level cache (LLC) that leverages the data-inclusion relationship between the private caches and the LLC, compressing two cache lines into one by XORing them. The architecture relies on the cache coherence protocol for data decompression. In this paper, we demonstrate that this mechanism—specifically the latency asymmetry between a cache hit on an uncompressed vs. compressed line—introduces microarchitectural vulnerabilities. Based on this observation, we propose a covert channel attack targeting the XOR cache. A colluding sender controls the receiver’s access latency by triggering decompression through targeted write requests to partner cache lines. By exploiting the data-dependent compression behavior of the XOR cache, the sender and receiver establish the channel using pre-agreed data values. The channel achieves higher bandwidth than the Prime+Probe baseline for two reasons: first, each bit is encoded in the compression state of an individual line rather than the occupancy of a cache set, so a single set carries multiple bits; second, each bit is resolved by manipulating coherence-protocol state rather than forcing shared-cache evictions, so it costs fewer LLC accesses and demand misses than Prime+Probe. Full-system simulations show a bandwidth of $2.9 \,{\mathrm{Mbps}}$ at an observed $0.98 \,\%$ bit-error rate (BER) over 50,000 transmitted bits, $13.1\;\times$ the bandwidth of Prime+Probe under the same sub-$1 \,\%$-BER selection rule.