An Area-Efficient Power Clamp Circuit for Surge Protections

Abstract

Surge, characterized by higher energy and longer duration, has a serious threat to semiconductor devices, components and systems. The metal oxide semiconductor field effect transistor (MOSFET)-based power clamp circuits are widely used for surge protection devices due to their ability to suppress overvoltage and discharge current during surge events. In this work, an areaefficient power clamp circuit is proposed and fabricated based on the 0.18 μm bipolar-CMOS-DMOS process. The conventional diode string is replaced to optimize the chip area. The experimental results show that the proposed circuit stably clamps the surge voltage at a certain value and provides reliable surge protection. Compared to the conventional diode-triggered circuits, the proposed power clamp circuits achieve an area reduction of 9.1% and 14.2% for clamping voltages of 33 V and 54 V, respectively. The peak surge current, leakage current and output capacitance are measured and show no significant deviation from those of conventional circuits. Furthermore, the results of reliability experiments demonstrate that the circuit can maintain operational stability and performance integrity under the conditions of multiple surge impact and high temperature.