Zhang Xin, Yang Tianqi, Xu Wei, Wang Shun, Xiaoxi Ma
{"title":"An Ultra-Low-Power Biopotential Acquisition Analog Front-End Chip for Wearable Devices","authors":"Zhang Xin, Yang Tianqi, Xu Wei, Wang Shun, Xiaoxi Ma","doi":"10.1002/cta.70573","DOIUrl":null,"url":null,"abstract":"<p>A 0.8-V, 1.2-μW biopotential analog front-end (AFE) IC is presented for wearable sensing. The front end combines a dynamically biased, chopper-stabilized capacitively coupled instrumentation amplifier (CCIA) with a dual-time-scale electrode dc-offset (EDO) management path. In steady state, a low-leakage DC servo loop (DSL) preserves sub-Hz baseline restoration and > 1 GΩ input impedance at 10 Hz; after an abrupt EDO disturbance, an event-triggered fast-recovery path temporarily increases the low-frequency discharge conductance and then returns to the low-leakage state. The 0.18-μm CMOS core occupies 0.35 mm<sup>2</sup>, provides 60- to 100-dB programmable gain, and consumes 1.2 μW from 0.8 V. Without trimming, calibration codes, or postmeasurement mismatch compensation, the measured input-referred integrated noise is 0.98 μVrms over 0.5–100 Hz, with CMRR > 125 dB, PSRR > 98 dB at 10 Hz, and > 1 GΩ input impedance at 10 Hz under the calibrated balanced bench fixture. New quantitative robustness validation shows postlayout PVT ranges of 121.8–127.9 dB for CMRR, 94.6–101.0 dB for PSRR, 0.93–1.07 μVrms for input-referred noise, and 53–82 ms for fast-recovery time; 200-run mismatch Monte Carlo analysis gives CMRR = 126.4 ± 2.7 dB, PSRR = 99.1 ± 2.1 dB, and input-referred offset = 0.08 ± 0.34 mV. For the representative EDO-step emulation, the fast-recovery mode returns to the sustained linear region in approximately 60–70 ms, whereas the DSL-only response remains unsettled at the 300-ms observation limit.</p>","PeriodicalId":13874,"journal":{"name":"International Journal of Circuit Theory and Applications","volume":"54 10","pages":"5030-5044"},"PeriodicalIF":1.4000,"publicationDate":"2026-10-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://onlinelibrary.wiley.com/doi/epdf/10.1002/cta.70573","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"International Journal of Circuit Theory and Applications","FirstCategoryId":"5","ListUrlMain":"https://onlinelibrary.wiley.com/doi/10.1002/cta.70573","RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"2026/7/26 0:00:00","PubModel":"Epub","JCR":"Q3","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
Abstract
A 0.8-V, 1.2-μW biopotential analog front-end (AFE) IC is presented for wearable sensing. The front end combines a dynamically biased, chopper-stabilized capacitively coupled instrumentation amplifier (CCIA) with a dual-time-scale electrode dc-offset (EDO) management path. In steady state, a low-leakage DC servo loop (DSL) preserves sub-Hz baseline restoration and > 1 GΩ input impedance at 10 Hz; after an abrupt EDO disturbance, an event-triggered fast-recovery path temporarily increases the low-frequency discharge conductance and then returns to the low-leakage state. The 0.18-μm CMOS core occupies 0.35 mm2, provides 60- to 100-dB programmable gain, and consumes 1.2 μW from 0.8 V. Without trimming, calibration codes, or postmeasurement mismatch compensation, the measured input-referred integrated noise is 0.98 μVrms over 0.5–100 Hz, with CMRR > 125 dB, PSRR > 98 dB at 10 Hz, and > 1 GΩ input impedance at 10 Hz under the calibrated balanced bench fixture. New quantitative robustness validation shows postlayout PVT ranges of 121.8–127.9 dB for CMRR, 94.6–101.0 dB for PSRR, 0.93–1.07 μVrms for input-referred noise, and 53–82 ms for fast-recovery time; 200-run mismatch Monte Carlo analysis gives CMRR = 126.4 ± 2.7 dB, PSRR = 99.1 ± 2.1 dB, and input-referred offset = 0.08 ± 0.34 mV. For the representative EDO-step emulation, the fast-recovery mode returns to the sustained linear region in approximately 60–70 ms, whereas the DSL-only response remains unsettled at the 300-ms observation limit.
期刊介绍:
The scope of the Journal comprises all aspects of the theory and design of analog and digital circuits together with the application of the ideas and techniques of circuit theory in other fields of science and engineering. Examples of the areas covered include: Fundamental Circuit Theory together with its mathematical and computational aspects; Circuit modeling of devices; Synthesis and design of filters and active circuits; Neural networks; Nonlinear and chaotic circuits; Signal processing and VLSI; Distributed, switched and digital circuits; Power electronics; Solid state devices. Contributions to CAD and simulation are welcome.