{"title":"Mobile-Ion-Induced Transient NDR in MoS2 FETs: Optimization Insights and Figures of Merit via Compact Modeling","authors":"Shaokai Zhou, Yehao Wu, Jianming Huang, Yezhu Lv, Haihui Cai, Yury Yuryevich Illarionov","doi":"10.1021/acsaelm.6c01088","DOIUrl":null,"url":null,"abstract":"<p>Transient negative differential resistance (TNDR) induced by the drift of mobile ions in gate dielectrics is of potential interest for memory and neuromorphic applications. However, the underlying physical dynamics and optimization strategies remain to be fully elucidated. This work presents a comprehensive investigation based on a compact physical model of ion-induced counterclockwise (CCW) hysteresis and TNDR in MoS<sub>2</sub> field-effect transistors (FETs) with HfO<sub>2</sub> gate insulators. We first establish the relationship between the gate sweep frequency and the resulting gate transfer characteristics, correlating distinct CCW hysteresis and TNDR regimes with the spatial trajectories of mobile charges within the oxide bulk. Then we investigate the impact of the interfacial activation energy barrier and reveal the physical mechanism that maximizes the TNDR response, namely ions are initially slowed by the gate-side barrier but subsequently enter the high-mobility bulk region just before the sweep reversal, enabling sustained drift and lag during the reverse sweep. Based on this mechanistic understanding, we further explore modulation of TNDR by adjusting the gate voltage sweep range and the oxide thickness. Our results reveal that the optimal conditions for maximizing the TNDR window (<em>ΔV</em><sub>TNDR</sub>) and overshoot (<em>R</em>) diverge, indicating a critical trade-off between performance magnitude and operating speed. To resolve this trade-off, we introduce a combined figure of merit (CFOM) that incorporates both magnitude and frequency metrics and identify the optimal bias and geometry within the parameter space explored in this work. These findings offer semiquantitative design guidelines for harnessing ion-induced gate oxide instabilities in functional electronic devices and their possible use for memory applications.</p>","PeriodicalId":3,"journal":{"name":"ACS Applied Electronic Materials","volume":"8 18","pages":"7790–7800"},"PeriodicalIF":4.7000,"publicationDate":"2026-09-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"ACS Applied Electronic Materials","FirstCategoryId":"88","ListUrlMain":"https://pubs.acs.org/doi/10.1021/acsaelm.6c01088","RegionNum":3,"RegionCategory":"材料科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"2026/9/2 0:00:00","PubModel":"Epub","JCR":"Q1","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
Abstract
Transient negative differential resistance (TNDR) induced by the drift of mobile ions in gate dielectrics is of potential interest for memory and neuromorphic applications. However, the underlying physical dynamics and optimization strategies remain to be fully elucidated. This work presents a comprehensive investigation based on a compact physical model of ion-induced counterclockwise (CCW) hysteresis and TNDR in MoS2 field-effect transistors (FETs) with HfO2 gate insulators. We first establish the relationship between the gate sweep frequency and the resulting gate transfer characteristics, correlating distinct CCW hysteresis and TNDR regimes with the spatial trajectories of mobile charges within the oxide bulk. Then we investigate the impact of the interfacial activation energy barrier and reveal the physical mechanism that maximizes the TNDR response, namely ions are initially slowed by the gate-side barrier but subsequently enter the high-mobility bulk region just before the sweep reversal, enabling sustained drift and lag during the reverse sweep. Based on this mechanistic understanding, we further explore modulation of TNDR by adjusting the gate voltage sweep range and the oxide thickness. Our results reveal that the optimal conditions for maximizing the TNDR window (ΔVTNDR) and overshoot (R) diverge, indicating a critical trade-off between performance magnitude and operating speed. To resolve this trade-off, we introduce a combined figure of merit (CFOM) that incorporates both magnitude and frequency metrics and identify the optimal bias and geometry within the parameter space explored in this work. These findings offer semiquantitative design guidelines for harnessing ion-induced gate oxide instabilities in functional electronic devices and their possible use for memory applications.
期刊介绍:
ACS Applied Electronic Materials is an interdisciplinary journal publishing original research covering all aspects of electronic materials. The journal is devoted to reports of new and original experimental and theoretical research of an applied nature that integrate knowledge in the areas of materials science, engineering, optics, physics, and chemistry into important applications of electronic materials. Sample research topics that span the journal's scope are inorganic, organic, ionic and polymeric materials with properties that include conducting, semiconducting, superconducting, insulating, dielectric, magnetic, optoelectronic, piezoelectric, ferroelectric and thermoelectric.
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