Two-dimensional materials for advanced back-end-of-line and wafer backside technologies.

Abstract

The continued evolution of computing hardware beyond conventional silicon complementary metal-oxide-semiconductor scaling demands new materials and innovative architectures to increase transistor density, reduce resistance-capacitance delay, mitigate thermal challenges and improve overall energy efficiency. Two-dimensional (2D) materials, including graphene, boron nitride and transition-metal dichalcogenides, offer a promising pathway to overcome interconnect scaling limits in advanced computing hardware. Their intrinsic properties enable reduced resistivity, lower resistance-capacitance delay and improved heat dissipation, making them particularly attractive for back-end-of-line (BEOL) applications. Moreover, the emerging backside power-delivery networks (BSPDNs) open up new application opportunities for 2D-material transistors at the wafer backside. In this Review, we focus on the integration of 2D materials in BEOL interconnects, including their roles as metallic wires, barrier/liner layers and dielectric fillers. We also discuss their potential for BEOL-integrated devices such as logic transistors, static random-access memory, embedded dynamic random-access memory, non-volatile memory and selectors, as well as their emerging use in BSPDNs. Through systematic benchmarking with conventional technologies, we highlight the promising opportunities offered by 2D materials in BEOL and backside integration for advanced node chip technologies and discuss the key challenges these new technologies face towards practical industrial applications.