Large-Margin Dynamic Memory Refresh for Persistent In-Memory Computing and Learning

IF 3.8 2区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC
Samira Sebt;Johannes Leugering;Georgios Gennis;Gert Cauwenberghs
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引用次数: 0

Abstract

In-memory-computing promises to reduce power consumption by tightly integrating analog compute logic and memory, thus avoiding costly data transfers. This requires analog storage with high density, sufficient precision and long retention. However, increasing retention at the device level often comes at the expense of excessive area, write energy and/or precision. We instead propose an algorithmic solution to realize dynamic semi-volatile memory, rooted in large-margin statistical learning theory, that dynamically refreshes the analog vector contents of an in-memory computing accelerator towards one among a large discrete set of stable states, and can thus extend its retention time indefinitely. We present three different variants of this algorithm, analyze its capabilities and limitations, and discuss potential applications.
用于持久内存计算和学习的大余量动态内存刷新
内存计算承诺通过紧密集成模拟计算逻辑和内存来降低功耗,从而避免昂贵的数据传输。这就要求模拟存储器具有高密度、足够的精度和长保留时间。然而,增加设备级的保留通常是以牺牲过多的面积、写入能量和/或精度为代价的。相反,我们提出了一种算法解决方案来实现动态半易失性存储器,植根于大裕度统计学习理论,该算法动态地将内存计算加速器的模拟向量内容刷新为大型离散稳定状态集合中的一个,从而可以无限期地延长其保留时间。我们提出了该算法的三种不同变体,分析了其功能和局限性,并讨论了潜在的应用。
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来源期刊
CiteScore
8.50
自引率
2.20%
发文量
86
期刊介绍: The IEEE Journal on Emerging and Selected Topics in Circuits and Systems is published quarterly and solicits, with particular emphasis on emerging areas, special issues on topics that cover the entire scope of the IEEE Circuits and Systems (CAS) Society, namely the theory, analysis, design, tools, and implementation of circuits and systems, spanning their theoretical foundations, applications, and architectures for signal and information processing.
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