Analysis of Input Sensitivity and Signal-to-Noise Ratio Characteristics of a Broadband Frequency Divider

Abstract

This paper systematically investigates the input-sensitivity characteristics of a frequency divider under broadband input conditions and introduces input signal-to-noise ratio (SNR) as an additional operating constraint. Through theoretical modeling and experimental verification, the relationships among input sensitivity, noise floor, equivalent input noise integration bandwidth, equivalent input-referred noise figure, and SNR are established, clarifying how these quantities jointly constrain divider operation. The technical contribution is to extend the conventional two-dimensional frequency–power sensitivity window by treating input SNR as a third constraint that explains noise-induced division failure under broadband input conditions. To enhance the signal-processing capability of the divider, an improved two-stage buffer amplifier is proposed to strengthen weak-signal amplification and waveform shaping. A broadband divide-by-four frequency-divider chip was fabricated and verified using heterojunction bipolar transistor (HBT) technology. Under a +5 V supply, the divider consumes 95 mA, operates from 0.2 to 12 GHz, and exhibits an input-sensitivity range of −15 to 10 dBm over 1–11 GHz. Under the adopted 8–12 GHz broadband input-noise test condition, stable frequency division requires an input SNR of no less than approximately 10 dB. The planar die dimensions are 1.2 × 0.8 mm. This study provides a theoretical and practical basis for the design and optimization of broadband frequency dividers.