A Wideband Single-Beam Four-Element QFN Transmit/Receive Beamformer IC in 65-nm CMOS

Abstract

This article presents a wideband single-beam four-element transmit (TX)/receive (RX) beamformer integrated circuit (BFIC) fabricated in 65-nm complementary metal oxide semiconductor (CMOS) and implemented in a quad flat no-lead (QFN) package, targeting phased-array front ends operating across 8–16 GHz. Each channel integrates a full 360° phase shifter (PS) with 2.8125° resolution and a 35-dB gain control range with 0.18-dB resolution, enabling beam steering and amplitude tapering over an octave bandwidth. Measured over 8–16 GHz, the proposed IC achieves 1.78° root mean square (rms) phase error and 0.23-dB rms gain error. In the TX path, the IC provides 23.5-dB gain and delivers 8.3-dBm output 1-dB compression point (OP1dB), 12.6-dBm saturated output power (PSAT), and 19.4-dBm output third-order intercept point (OIP3), while consuming 198.5 mW per channel. In the RX path, it achieves 9.7-dB gain with 5.9-dB noise figure (NF), together with −18.1-dBm input 1-dB compression point (IP_{1 dB}) and −7.4-dBm input third-OIP3 (IIP3), while consuming 89 mW per channel. For 50-Ms/s quadrature phase-shift keying (QPSK), 8-PSK, 16-QAM, and 64-QAM signals at 8, 12, and 16 GHz with input power from −50 to −5 dBm, the BiCMOS ultrawideband flip-chip packaging RX beamformer IC (BFIC) exhibits minimum error vector magnitude (EVM) below 2.7% in both TX and RX paths. The chip occupies 17.6 mm² ( $4.4\times 4$ mm²). To the best of our knowledge, the key innovations of this work include the first demonstrations of a fully integrated wideband 8–16-GHz 4 T/4 R QFN BFIC in 65-nm CMOS, a comparative analysis of QFN bondwire configurations with and without downbonding for wideband multichannel operation, and a phase/gain tuning optimization algorithm that minimizes the rms phase and gain errors.