High-transconductance molybdenum disulfide top-gate transistors using epitaxial interface engineering

IF 42.3 1区 工程技术 Q1 ENGINEERING, ELECTRICAL & ELECTRONIC
Yuan-Chun Su, Po-Sen Mao, Chih-Yao Shih, Shih-Ting Wang, Yun-Yang Shen, Zih-Siang Jian, Hsiang-Chi Hu, Wei-Chen Tseng, Hsin-Ya Sung, Chih-Yen Lin, Zi-Yun Fong, Yu-Tung Lin, Kun-An Chiu, Fong-Zhi Chen, Ming-Yang Li, Wen-Wei Wu, Chao-Ching Cheng, Chih-I. Wu, Tsung-En Lee, Iuliana P. Radu, Wen-Hao Chang
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Abstract

High transconductance is a key performance metric in field-effect transistors, directly influencing voltage gain, switching speed and bandwidth. In two-dimensional field-effect transistors, achieving a high transconductance requires a low equivalent oxide thickness, scaled channel length and preserved carrier mobility—three factors that are difficult to optimize simultaneously. Reduced equivalent oxide thickness (less than 1 nm) can be achieved with high-κ-dielectric integration, but such scaling often introduces dielectric-related scattering that degrades mobility and limits transconductance. Here we show that an epitaxial interface engineering approach can be used to create monolayer molybdenum disulfide top-gate field-effect transistors with a high transconductance of 0.45 mS µm−1 at an equivalent oxide thickness of around 1 nm. We grow an epitaxial aluminium film directly on molybdenum disulfide in an ultrahigh vacuum, which is followed by in situ low-pressure oxidation to form an epitaxially derived aluminium oxide interfacial layer. This layer supports uniform integration of hafnium oxide and suppresses dielectric-induced scattering, leading to strong gate control without notable mobility degradation. Monolayer molybdenum disulfide top-gate field-effect transistors with a transconductance of 0.45 mS µm−1 at an equivalent oxide thickness of around 1 nm can be created with the help of an epitaxially derived aluminium oxide interfacial layer.

Abstract Image

采用外延界面工程的高跨导二硫化钼顶栅晶体管
高跨导是场效应晶体管的关键性能指标,它直接影响到场效应晶体管的电压增益、开关速度和带宽。在二维场效应晶体管中,实现高跨导需要较低的等效氧化物厚度、可缩放的沟道长度和保留载流子迁移率——这三个因素很难同时优化。通过高介电集成度可以实现降低等效氧化物厚度(小于1nm),但这种缩放通常会引入介电相关散射,从而降低迁移率并限制跨导性。在这里,我们展示了外延界面工程方法可以用于创建单层二硫化钼顶栅场效应晶体管,其跨导率为0.45 mSµm−1,等效氧化物厚度约为1 nm。我们在超高真空中直接在二硫化钼上生长外延铝膜,然后在原位低压氧化形成外延衍生的氧化铝界面层。该层支持氧化铪的均匀集成,抑制电介质引起的散射,导致强栅极控制而不显着降低迁移率。
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来源期刊
Nature Electronics
Nature Electronics Engineering-Electrical and Electronic Engineering
CiteScore
47.50
自引率
2.30%
发文量
159
期刊介绍: Nature Electronics is a comprehensive journal that publishes both fundamental and applied research in the field of electronics. It encompasses a wide range of topics, including the study of new phenomena and devices, the design and construction of electronic circuits, and the practical applications of electronics. In addition, the journal explores the commercial and industrial aspects of electronics research. The primary focus of Nature Electronics is on the development of technology and its potential impact on society. The journal incorporates the contributions of scientists, engineers, and industry professionals, offering a platform for their research findings. Moreover, Nature Electronics provides insightful commentary, thorough reviews, and analysis of the key issues that shape the field, as well as the technologies that are reshaping society. Like all journals within the prestigious Nature brand, Nature Electronics upholds the highest standards of quality. It maintains a dedicated team of professional editors and follows a fair and rigorous peer-review process. The journal also ensures impeccable copy-editing and production, enabling swift publication. Additionally, Nature Electronics prides itself on its editorial independence, ensuring unbiased and impartial reporting. In summary, Nature Electronics is a leading journal that publishes cutting-edge research in electronics. With its multidisciplinary approach and commitment to excellence, the journal serves as a valuable resource for scientists, engineers, and industry professionals seeking to stay at the forefront of advancements in the field.
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