An integrated monolithic photonic accelerometer with on-chip fringe-counting.

Abstract

Photonic integrated circuits have transformed optical communication and information processing, yet their potential for precision inertial sensing remains largely untapped. To date, photonic accelerometers have been constrained by readout complexity, limited dynamic range, and insufficient experimental validation. Here we present the design, modelling, and experimental characterization of an integrated photonic accelerometer that combines high sensitivity with substantially enhanced dynamic range via phase-unwrapping. The device achieves a measured noise floor of $2.0\mu g/\sqrt{\mathrm{Hz}}$ , with a pathway towards $~10\mathrm{ng}/\sqrt{\mathrm{Hz}}$ through simultaneous scaling of the input optical power and the number of waveguide loops on the cantilever - together projected to bring the input-referred shot-noise-limited sensitivity to the thermal-mechanical noise floor. By incorporating ellipse-fitting-based phase-unwrapping, the sensor enables accurate phase recovery over a substantially expanded measurement range, yielding a 39 dB improvement in dynamic range compared to a conventional Mach-Zehnder interferometer. To our knowledge, this is the first photonic integrated circuit accelerometer to incorporate fringe-counting functionality in a monolithic chip, and the first systematic study of such a strategy in integrated photonic inertial sensors. The photonic hardware enabling open-loop fringe counting - two Mach-Zehnder interferometers with a nominal quarter-wavelength inter-arm path-length offset, whose actual inter-interferometer phase difference is recovered from an in-situ ellipse fit - is monolithically integrated on the silicon-nitride chip, while the ellipse-fit phase-unwrapping algorithm runs in post-processing without active biasing or feedback control. These results establish integrated photonics as a promising platform for high-dynamic-range inertial sensing and a route to chip-scale accelerometers that could surpass existing chip-based technologies.