Bayesian Model Calibration for Deep-Learning-Based Indirect Test of Analog Circuits

IF 3.2 2区 工程技术 Q2 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE
Jiaming Zhao;Yijiu Zhao;Shibo Chen;Jiawei Cao;Naixin Zhou;E. Shao
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引用次数: 0

Abstract

The indirect test offers a cost-effective alternative for the specification test of analog integrated circuits (ICs). It infers high-cost specifications from low-cost measurements through a mapping function. Deep learning provides an efficient means for modeling this mapping. However, batch-to-batch variations in IC manufacturing often lead to distribution shifts, which degrade the accuracy of such data-driven techniques. To address this, we propose a transfer learning-based framework—Bayesian model calibration (BMC)—for the indirect test. During testing, a deep neural network (DNN) is trained with early data for estimation. When a new-batch arrives, a small number of samples are conventionally tested to form a calibration set. The original estimator is updated with the new dataset via a Bayesian loss function. This loss function integrates a prior term (reflecting the early data) and a likelihood term (reflecting the new data), enabling a principled tradeoff between prior knowledge and new observations. The estimator thereby adapts its parameters to improve accuracy on the new batch. Moreover, by adjusting the relative weights of the prior and likelihood terms, the extent of model update can be controlled to match the degree of distribution shift, achieving optimal calibration. The proposed approach is evaluated on a simulated operational amplifier and two commercial IC datasets to demonstrate its advantage. The BMC can improve accuracy on new batches with minimal additional samples. Moreover, by flexibly integrating the prior knowledge and new data, it outperforms baseline methods such as direct data combination (DC) and simple fine-tuning (SFT).
基于深度学习的模拟电路间接测试贝叶斯模型标定
间接测试为模拟集成电路(ic)的规格测试提供了一种经济有效的替代方法。它通过映射功能从低成本的测量中推断出高成本的规格。深度学习为这种映射的建模提供了一种有效的方法。然而,集成电路制造中批量到批量的变化经常导致分布变化,从而降低了这种数据驱动技术的准确性。为了解决这个问题,我们提出了一个基于迁移学习的框架-贝叶斯模型校准(BMC) -用于间接测试。在测试过程中,使用早期数据训练深度神经网络(DNN)进行估计。当新一批样品到达时,按常规测试少量样品以形成校准集。原始估计器通过贝叶斯损失函数更新新数据集。这个损失函数集成了一个先验项(反映早期数据)和一个似然项(反映新数据),在先验知识和新观测之间实现了原则性的权衡。估计器因此调整其参数以提高新批的精度。此外,通过调整先验项和似然项的相对权重,可以控制模型更新的程度以匹配分布偏移的程度,从而实现最优校准。在一个模拟运算放大器和两个商业IC数据集上对该方法进行了评估,以证明其优势。BMC可以用最少的额外样品提高新批次的准确性。此外,通过灵活地整合先验知识和新数据,该方法优于直接数据组合(DC)和简单微调(SFT)等基线方法。
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来源期刊
CiteScore
6.40
自引率
7.10%
发文量
187
审稿时长
3.6 months
期刊介绍: The IEEE Transactions on VLSI Systems is published as a monthly journal under the co-sponsorship of the IEEE Circuits and Systems Society, the IEEE Computer Society, and the IEEE Solid-State Circuits Society. Design and realization of microelectronic systems using VLSI/ULSI technologies require close collaboration among scientists and engineers in the fields of systems architecture, logic and circuit design, chips and wafer fabrication, packaging, testing and systems applications. Generation of specifications, design and verification must be performed at all abstraction levels, including the system, register-transfer, logic, circuit, transistor and process levels. To address this critical area through a common forum, the IEEE Transactions on VLSI Systems have been founded. The editorial board, consisting of international experts, invites original papers which emphasize and merit the novel systems integration aspects of microelectronic systems including interactions among systems design and partitioning, logic and memory design, digital and analog circuit design, layout synthesis, CAD tools, chips and wafer fabrication, testing and packaging, and systems level qualification. Thus, the coverage of these Transactions will focus on VLSI/ULSI microelectronic systems integration.
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