A Data-Driven Approach to Online Fault Detection in RRAM-Based Neuromorphic Hardware Using Adversarial-Inspired Test

IF 3.2 2区工程技术 Q2 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE

IEEE Transactions on Very Large Scale Integration (VLSI) Systems Pub Date : 2026-06-01 Epub Date: 2026-03-03 DOI:10.1109/TVLSI.2026.3667040

Ming Cheng;Xiao-Chun Li;David Keezer

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引用次数: 0

Abstract

Resistive random access memory (RRAM)-based neuromorphic computing systems (RNCS) show great promise for low-power edge computing applications. However, hardware reliability issues in RRAM devices remain unresolved. Due to the inherent fault tolerance of RNCS, many faults do not immediately degrade system accuracy, but minor faults may pose latent risks. Meanwhile, traditional fault detection methods are insufficient for edge systems that require strict efficiency and real-time operation. This work proposes a data-driven approach based on multistage extreme gradient boosting (XGBoost) and adversarial-inspired test, specifically designed for fast online fault detection in RNCS, focusing on cell-level SAF detection under diverse fault distributions. Experiments on convolutional layers of pretrained convolutional neural network (CNN) models in RNCS demonstrate the framework’s effectiveness for real-time SAF diagnosis. Under low fault rate conditions, the proposed approach achieves an average recall of 99.8% and an average

$F1$

-score of 99.5%. In addition, the test dataset generated using the iterative fast gradient sign method (IFGSM) (adversarial-inspired test) effectively improves the distinguishability of RNCS fault-induced output signatures.

查看原文本刊更多论文

基于数据驱动的基于ram的神经形态硬件在线故障检测方法

基于电阻随机存取存储器（RRAM）的神经形态计算系统（RNCS）在低功耗边缘计算应用中显示出巨大的前景。然而，RRAM设备的硬件可靠性问题仍然没有解决。由于RNCS固有的容错性，许多故障不会立即降低系统的精度，但较小的故障可能会带来潜在的风险。同时，对于对效率和实时性要求严格的边缘系统，传统的故障检测方法是不够的。这项工作提出了一种基于多级极端梯度增强（XGBoost）和对抗启发测试的数据驱动方法，专为RNCS中的快速在线故障检测而设计，重点关注不同故障分布下的细胞级SAF检测。在RNCS中预训练卷积神经网络（CNN）模型的卷积层上进行的实验证明了该框架对实时SAF诊断的有效性。在低故障率条件下，该方法的平均召回率为99.8%，平均$F1$ -分数为99.5%。此外，使用迭代快速梯度符号方法（IFGSM）（对抗启发测试）生成的测试数据集有效地提高了RNCS故障诱导输出签名的可分辨性。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

IEEE Transactions on Very Large Scale Integration (VLSI) Systems 工程技术-工程：电子与电气

CiteScore

6.40

自引率

7.10%

发文量

187

审稿时长

3.6 months

期刊介绍： The IEEE Transactions on VLSI Systems is published as a monthly journal under the co-sponsorship of the IEEE Circuits and Systems Society, the IEEE Computer Society, and the IEEE Solid-State Circuits Society. Design and realization of microelectronic systems using VLSI/ULSI technologies require close collaboration among scientists and engineers in the fields of systems architecture, logic and circuit design, chips and wafer fabrication, packaging, testing and systems applications. Generation of specifications, design and verification must be performed at all abstraction levels, including the system, register-transfer, logic, circuit, transistor and process levels. To address this critical area through a common forum, the IEEE Transactions on VLSI Systems have been founded. The editorial board, consisting of international experts, invites original papers which emphasize and merit the novel systems integration aspects of microelectronic systems including interactions among systems design and partitioning, logic and memory design, digital and analog circuit design, layout synthesis, CAD tools, chips and wafer fabrication, testing and packaging, and systems level qualification. Thus, the coverage of these Transactions will focus on VLSI/ULSI microelectronic systems integration.