{"title":"A Signal-Path Recognition Approach to Multistage Op-Amp Pole-Zero Extraction With Applications","authors":"Mingzhen Li;Guoyong Shi","doi":"10.1109/TCAD.2025.3638265","DOIUrl":null,"url":null,"abstract":"In the design of multistage operational amplifiers (Op-Amps), pole-zero (PZ) analysis lies at the core of whole design innovation for compensation. This article proposes a signal-path recognition method to help with the auto-generation of readable analytical PZ expressions from a circuit netlist. Prior symbolic PZ extraction methods have limitations in either requiring numerical references or yielding insufficiently compactness after simplification. The proposed method circumvents these limitations via a two-phase process: a topology simplification phase and a term simplification phase. In the topology simplification phase, signal paths of a multistage Op-Amp are detected via programmable routines, capturing the main amplification stages and frequency compensation paths, based on which the transfer function (TF) and PZs can be generated. In the term simplification phase, we propose a method that only refers to the magnitude orders of terms by assuming elementary device parameter orders based on a technology file. Sixteen test cases featuring varied compensation strategies are employed to demonstrate the applicability of this research. Our implementation delivers a fully automated netlist-to-PZ workflow, which can generate informative PZ expressions in compact and readable forms within minutes, offering useful insights to the circuit designer.","PeriodicalId":13251,"journal":{"name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","volume":"45 7","pages":"3045-3058"},"PeriodicalIF":3.6000,"publicationDate":"2026-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","FirstCategoryId":"94","ListUrlMain":"https://ieeexplore.ieee.org/document/11270852/","RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"2025/11/27 0:00:00","PubModel":"Epub","JCR":"Q2","JCRName":"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE","Score":null,"Total":0}
引用次数: 0
Abstract
In the design of multistage operational amplifiers (Op-Amps), pole-zero (PZ) analysis lies at the core of whole design innovation for compensation. This article proposes a signal-path recognition method to help with the auto-generation of readable analytical PZ expressions from a circuit netlist. Prior symbolic PZ extraction methods have limitations in either requiring numerical references or yielding insufficiently compactness after simplification. The proposed method circumvents these limitations via a two-phase process: a topology simplification phase and a term simplification phase. In the topology simplification phase, signal paths of a multistage Op-Amp are detected via programmable routines, capturing the main amplification stages and frequency compensation paths, based on which the transfer function (TF) and PZs can be generated. In the term simplification phase, we propose a method that only refers to the magnitude orders of terms by assuming elementary device parameter orders based on a technology file. Sixteen test cases featuring varied compensation strategies are employed to demonstrate the applicability of this research. Our implementation delivers a fully automated netlist-to-PZ workflow, which can generate informative PZ expressions in compact and readable forms within minutes, offering useful insights to the circuit designer.
期刊介绍:
The purpose of this Transactions is to publish papers of interest to individuals in the area of computer-aided design of integrated circuits and systems composed of analog, digital, mixed-signal, optical, or microwave components. The aids include methods, models, algorithms, and man-machine interfaces for system-level, physical and logical design including: planning, synthesis, partitioning, modeling, simulation, layout, verification, testing, hardware-software co-design and documentation of integrated circuit and system designs of all complexities. Design tools and techniques for evaluating and designing integrated circuits and systems for metrics such as performance, power, reliability, testability, and security are a focus.