A Fully Analog Computing-in-Memory Macro With INT8-MAC Operations for Edge-AI Device

IF 3.8 2区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC
Wei-Cheng Huang;Hsin-Ta Chien;Soon-Jyh Chang;Jia-Hao Hu;Chih-Hung Kuo
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引用次数: 0

Abstract

Sensors capture large volumes of data containing both critical and redundant information for neural network (NN) inference. However, limited bandwidth and energy efficiency at the sensor-side analog-to-digital conversion (ADC) and data transmission stages significantly increase latency and power consumption in edge devices. Conventional data compression can reduce data volume but cannot distinguish which information is important for the NNs, especially in early layers, where precision is highly sensitive. Such distortions propagate and degrade the overall inference accuracy. To address these challenges, this paper proposes a fully analog computing-in-memory (FACIM) macro that implements and experimentally demonstrates analog-domain feature extraction and inter-layer analog signal propagation mechanisms for NNs. Unlike conventional CIM architectures that rely on inter-layer ADCs, the FACIM concept performs feature extraction directly in the analog domain, thereby reducing early-stage quantization effects and unnecessary data movement. This approach provides a potential pathway toward improved energy efficiency in edge-AI systems. The FACIM macro was fabricated using TSMC 0.18- $\mu $ m CMOS 1P6M standard technology. It achieves an energy efficiency of 1,880 TOPS/W for INT8 multiply-and-accumulate (MAC) operations and 117 TOPS/W at the system level. The macro demonstrates an area efficiency of 97.76 GOPS/mm2 [normalized macro area (Jhang, 2021)].
Edge-AI设备中具有INT8-MAC操作的完全模拟内存计算宏
传感器捕获大量的数据,其中包括关键和冗余信息的神经网络(NN)推理。然而,传感器端模数转换(ADC)和数据传输阶段有限的带宽和能效显著增加了边缘设备的延迟和功耗。传统的数据压缩可以减少数据量,但不能区分哪些信息对神经网络是重要的,特别是在精度高度敏感的早期层。这种扭曲传播并降低了整体推理精度。为了解决这些挑战,本文提出了一个全模拟内存计算(FACIM)宏,该宏实现并实验演示了神经网络的模拟域特征提取和层间模拟信号传播机制。与依赖层间adc的传统CIM架构不同,FACIM概念直接在模拟域中执行特征提取,从而减少了早期量化影响和不必要的数据移动。这种方法为提高边缘人工智能系统的能源效率提供了一条潜在的途径。FACIM宏采用台积电0.18- $\mu $ m CMOS 1P6M标准工艺制作。它实现了1,880 TOPS/W的INT8乘法和累积(MAC)操作和117 TOPS/W的系统级别的能源效率。宏观的面积效率为97.76 GOPS/mm2[归一化宏观面积(Jhang, 2021)]。
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来源期刊
CiteScore
8.50
自引率
2.20%
发文量
86
期刊介绍: The IEEE Journal on Emerging and Selected Topics in Circuits and Systems is published quarterly and solicits, with particular emphasis on emerging areas, special issues on topics that cover the entire scope of the IEEE Circuits and Systems (CAS) Society, namely the theory, analysis, design, tools, and implementation of circuits and systems, spanning their theoretical foundations, applications, and architectures for signal and information processing.
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