CirOPT: Toward Effective Combinational Equivalence Checking via Compiler Optimization

IF 3.6 3区 计算机科学 Q2 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE
Shaoke Cui;Chuan Luo;Zhenwei Yang;Jiabao Lin;Wei Wu;Chanjuan Liu;Shaowei Cai;Chunming Hu
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引用次数: 0

Abstract

Combinational equivalence checking (CEC) is essential for verifying the correctness of circuit designs. With the growing complexity of circuits, effective verification techniques have become increasingly critical. Recently, a conjunctive normal form (CNF)-based approach, converting circuits to CNF for Boolean satisfiability (SAT) solvers, has shown competitive performance compared to state-of-the-art hybrid SAT sweeping approaches. The capability of this CNF-based approach depends on effective CNF conversion. This work presents CirOPT, which is the first CNF conversion method using compiler optimization to equivalently simplify circuits. Extensive experiments are conducted on a broad range of real-world benchmarks, which are far more than the number of benchmarks typically used in empirical studies. The results reveal that, when paired with the state-of-the-art CNF SAT solver Kissat, CirOPT considerably outperforms existing approaches in CEC.
通过编译器优化实现有效的组合等价检验
组合等效检验(CEC)是验证电路设计正确性的必要手段。随着电路的日益复杂,有效的验证技术变得越来越重要。最近,一种基于合取范式(CNF)的方法,将电路转换为CNF用于布尔可满足性(SAT)求解,与最先进的混合SAT扫描方法相比,已经显示出具有竞争力的性能。这种基于CNF的方法的能力取决于有效的CNF转换。这项工作提出了cirpt,这是第一个使用编译器优化来等效简化电路的CNF转换方法。在广泛的现实世界基准上进行了大量的实验,这远远超过了实证研究中通常使用的基准数量。结果表明,当与最先进的CNF SAT求解器Kissat配对时,cirpt在CEC中显着优于现有方法。
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来源期刊
CiteScore
5.60
自引率
13.80%
发文量
500
审稿时长
7 months
期刊介绍: The purpose of this Transactions is to publish papers of interest to individuals in the area of computer-aided design of integrated circuits and systems composed of analog, digital, mixed-signal, optical, or microwave components. The aids include methods, models, algorithms, and man-machine interfaces for system-level, physical and logical design including: planning, synthesis, partitioning, modeling, simulation, layout, verification, testing, hardware-software co-design and documentation of integrated circuit and system designs of all complexities. Design tools and techniques for evaluating and designing integrated circuits and systems for metrics such as performance, power, reliability, testability, and security are a focus.
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