{"title":"A Direct-Capacitance-Conversion FeRAM Characterization Platform for Enabling Non-Destructive 3-D Ferroelectric Capacitor Readout","authors":"Xiongfei Jiang;Chaohan Wang;Yang Xiang;Shiwei Wang;Themis Prodromakis;Marie Garcia Bardon;Jan Van Houdt;Fernando Garcia Redondo;Dwaipayan Biswas","doi":"10.1109/TCSII.2026.3668123","DOIUrl":null,"url":null,"abstract":"Ferroelectric-capacitor-based memory (FeRAM) is a promising emerging non-volatile memory technology that offers fast access and high endurance. Recent studies have demonstrated Ferroelectric-capacitor-based memory (FeRAM) has the potential to support Non-Destructive Readout (NDRO) as well as 3D stacking, enabling read operations that do not disturb or minor disturb the stored polarization state and higher density. However, variations in ferroelectric materials and layer structures lead to diverse hysteresis behaviors, resulting in different sensing requirements. In addition, the reduced capacitor size in deeply stacked 3D architectures further decreases the available charge, making accurate readout increasingly challenging. To better understand these issues, this work presents a highly scalable direct-capacitance-conversion characterization circuit that is capable of extracting the equivalent ferroelectric capacitance from a 3D FeRAM array. Leveraging a continuous-time delta-sigma modulator (CTDSM), the proposed platform can accurately quantize small ferroelectric equivalent capacitances ranging from 0 to 72fF with low noise and high resolution, and achieves a capacitance resolution of <inline-formula> <tex-math>$0.045\\mathrm {fF_{rms}}$ </tex-math></inline-formula> while consuming only <inline-formula> <tex-math>$3\\mu $ </tex-math></inline-formula>W power and occupying 0.001mm<sup>2</sup> chip area under a 22nm FDSOI technology. These results demonstrate the capability to characterize 3D FeRAM arrays with up to 64 vertically stacked ferroelectric capacitors (FeCAPs) and highlight strong scalability for large-scale FeRAM evaluation and design exploration.","PeriodicalId":13101,"journal":{"name":"IEEE Transactions on Circuits and Systems II: Express Briefs","volume":"73 4","pages":"403-407"},"PeriodicalIF":4.6000,"publicationDate":"2026-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Transactions on Circuits and Systems II: Express Briefs","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/11414158/","RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"2026/2/26 0:00:00","PubModel":"Epub","JCR":"Q2","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
Abstract
Ferroelectric-capacitor-based memory (FeRAM) is a promising emerging non-volatile memory technology that offers fast access and high endurance. Recent studies have demonstrated Ferroelectric-capacitor-based memory (FeRAM) has the potential to support Non-Destructive Readout (NDRO) as well as 3D stacking, enabling read operations that do not disturb or minor disturb the stored polarization state and higher density. However, variations in ferroelectric materials and layer structures lead to diverse hysteresis behaviors, resulting in different sensing requirements. In addition, the reduced capacitor size in deeply stacked 3D architectures further decreases the available charge, making accurate readout increasingly challenging. To better understand these issues, this work presents a highly scalable direct-capacitance-conversion characterization circuit that is capable of extracting the equivalent ferroelectric capacitance from a 3D FeRAM array. Leveraging a continuous-time delta-sigma modulator (CTDSM), the proposed platform can accurately quantize small ferroelectric equivalent capacitances ranging from 0 to 72fF with low noise and high resolution, and achieves a capacitance resolution of $0.045\mathrm {fF_{rms}}$ while consuming only $3\mu $ W power and occupying 0.001mm2 chip area under a 22nm FDSOI technology. These results demonstrate the capability to characterize 3D FeRAM arrays with up to 64 vertically stacked ferroelectric capacitors (FeCAPs) and highlight strong scalability for large-scale FeRAM evaluation and design exploration.
期刊介绍:
TCAS II publishes brief papers in the field specified by the theory, analysis, design, and practical implementations of circuits, and the application of circuit techniques to systems and to signal processing. Included is the whole spectrum from basic scientific theory to industrial applications. The field of interest covered includes:
Circuits: Analog, Digital and Mixed Signal Circuits and Systems
Nonlinear Circuits and Systems, Integrated Sensors, MEMS and Systems on Chip, Nanoscale Circuits and Systems, Optoelectronic
Circuits and Systems, Power Electronics and Systems
Software for Analog-and-Logic Circuits and Systems
Control aspects of Circuits and Systems.