AsyncGrid: An Intralayer and Interlayer Asynchronous Hybrid Parallelism System for Responsive Edge LLM Inference

IF 3.6 3区 计算机科学 Q2 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE
Yi Xiong;Rui Zhang;Yulong Zu;Weihong Liu;Zongwei Zhu;Jiawei Geng;Boyu Li;Qianyue Cao;Xuehai Zhou
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引用次数: 0

Abstract

Edge deployment of large language models (LLMs) is increasingly attractive due to its advantages in privacy, customization, and availability. However, edge environments face significant challenges in reducing time-to-first-token (TTFT). TTFT consists of: 1) queuing delay and 2) prefill latency, both of which are exacerbated by edge-resource constraints. The substantial computational demands of LLM inference grow superlinearly with prompt length, causing high prefill latency; and limited edge resources restrict prefill throughput, preventing the timely handling of incoming requests, thereby exacerbating queuing delays. Model parallelism is a commonly used solution in cloud-based systems, but directly applying it to edge environments proves ineffective. Intralayer parallelism [e.g., tensor/sequence parallelism (SP)] can reduce prefill latency but suffers from frequent global synchronization, which bottlenecks prefill throughput due to edge-limited interconnection bandwidth. Interlayer parallelism [e.g., pipeline parallelism (PP)] improves prefill throughput via fully asynchronous execution but retains high prefill latency due to stage-wise serialized computation. To address this dilemma, this article leverages the properties of the causal attention mechanism in LLMs and proposes intralayer asynchronous parallelism (IAP), which performs intralayer parallel computations to reduce prefill latency while avoiding global synchronization to mitigate prefill throughput bottlenecks. Moreover, considering communication sensitivity in intralayer parallelism, this article integrates IAP with interlayer asynchronous parallelism into a unified plan space. This hybrid parallelism adapts to diverse hardware and request loads, enabling more effective TTFT optimization. To enable the end-to-end implementation of this hybrid parallelism, this article proposes AsyncGrid, an LLM inference system tailored for responsive edge LLM inference. AsyncGrid: 1) models runtime overheads through a performance profiler; 2) employs an integer programming (IP) formulation to optimize execution plan, with the objective of minimizing latency while meeting throughput requirements; and 3) implements fine-grained communication optimization (FCO) during runtime. A comprehensive evaluation on an edge testbed demonstrates AsyncGrid’s significant advantages over existing methods, achieving substantial improvements in both homogeneous and heterogeneous settings.
基于响应边缘LLM推理的层内和层间异步混合并行系统
大型语言模型(llm)的边缘部署越来越有吸引力,因为它在隐私、定制和可用性方面具有优势。然而,边缘环境在减少到第一个令牌的时间(TTFT)方面面临着重大挑战。TTFT包括:1)排队延迟和2)预填充延迟,这两种延迟都受到边缘资源约束的加剧。LLM推理的大量计算需求随着提示长度超线性增长,导致高预填充延迟;有限的边缘资源限制了预填充吞吐量,无法及时处理传入请求,从而加剧了排队延迟。模型并行是基于云的系统中常用的解决方案,但将其直接应用于边缘环境被证明是无效的。层内并行[例如,张量/序列并行(SP)]可以减少预填充延迟,但受到频繁的全局同步的影响,由于边缘有限的互连带宽,这会瓶颈预填充吞吐量。层间并行[例如,管道并行(PP)]通过完全异步执行提高了预填充吞吐量,但由于分阶段序列化计算,保留了很高的预填充延迟。为了解决这一难题,本文利用llm中因果注意机制的特性,提出了层内异步并行(IAP),它执行层内并行计算以减少预填充延迟,同时避免全局同步,以缓解预填充吞吐量瓶颈。此外,考虑到层内并行的通信敏感性,本文将IAP与层间异步并行集成到一个统一的规划空间中。这种混合并行性适应不同的硬件和请求负载,从而实现更有效的TTFT优化。为了实现这种混合并行性的端到端实现,本文提出了AsyncGrid,这是一种为响应式边缘LLM推理量身定制的LLM推理系统。AsyncGrid: 1)通过性能分析器建模运行时开销;2)采用整数规划(IP)公式优化执行计划,在满足吞吐量要求的同时最小化延迟;3)运行时实现细粒度通信优化(FCO)。在边缘测试平台上的综合评估表明,AsyncGrid比现有方法具有显著优势,在同构和异构设置中都取得了实质性的改进。
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来源期刊
CiteScore
5.60
自引率
13.80%
发文量
500
审稿时长
7 months
期刊介绍: The purpose of this Transactions is to publish papers of interest to individuals in the area of computer-aided design of integrated circuits and systems composed of analog, digital, mixed-signal, optical, or microwave components. The aids include methods, models, algorithms, and man-machine interfaces for system-level, physical and logical design including: planning, synthesis, partitioning, modeling, simulation, layout, verification, testing, hardware-software co-design and documentation of integrated circuit and system designs of all complexities. Design tools and techniques for evaluating and designing integrated circuits and systems for metrics such as performance, power, reliability, testability, and security are a focus.
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