Analog Mixed-Signal Circuit Splitting and Defect Simulation Method Based on Signal Flow Diagram

IF 3.6 3区 计算机科学 Q2 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE
Chenglin Yang;Hanyu Wen;Xinhong Huang;Han Chen;Qihao Zhang;Haitao Fu
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Abstract

Comprehensive defect simulation in the integrated circuit design stage is the basic guarantee to improve testability, which is also the basic requirement of current automotive-grade chip design. For example, there are six types of basic defect models for a single MOS transistor in a circuit, and the defect set of analog/hybrid integrated circuits containing thousands of devices is extremely large. It is very time-consuming to inject a large number of defects one by one and solve them in a large-scale matrix. In fact, the complete defect simulation often takes months or even years, and there is no good solution at present. In this article, a circuit splitting method based on signal flow and graph analysis is proposed, which models the control relationship between the device current and voltage nodes of the circuit with a directed dependence graph (DDG) through signal flow analysis. Then, more weak connections are obtained by identifying and breaking the feedback loops of larger strongly connected components (SCCs), and the weak connectivity in SCCs is split to realize circuit splitting. The acceleration can then be achieved by parallel defect simulation. At the same time, in order to investigate the observability of the internal defects in the previous SCCs in the subsequent SCCs, the defects were simulated according to the one-way transfer relationship between each SCC in a directed acyclic graph (DAG). An equivalent compression method of the defects and the signal in the transfer process is proposed, which reduces the number of simulation times of the defects. Finally, this article takes the benchmark BANDGAP, LDO, and SARADC circuits as examples and uses HSPICE simulation to verify the effectiveness of the graph splitting method. Compared with the latest transistor-level circuit splitting scheme, the circuit splitting algorithm proposed in this article can split more and smaller circuit blocks. Using the circuit blocks, we have divided to implement the parallel defect simulation scheme, and the defect transfer simulation scheme is more effective than the traditional full-circuit and full-defect simulation one by one.
基于信号流图的模拟混合信号电路分割及缺陷仿真方法
集成电路设计阶段的全面缺陷仿真是提高可测试性的基本保证,也是当前汽车级芯片设计的基本要求。例如,电路中单个MOS晶体管的基本缺陷模型有六种类型,包含数千个器件的模拟/混合集成电路的缺陷集非常大。将大量缺陷逐个注入并在大尺度矩阵中求解是非常耗时的。事实上,完整的缺陷模拟往往需要几个月甚至几年的时间,目前还没有很好的解决方案。本文提出了一种基于信号流和图分析的电路分割方法,通过信号流分析,用有向依赖图(DDG)来建模电路中器件电流和电压节点之间的控制关系。然后,通过识别和切断较大的强连接组件(scc)的反馈回路,获得更多的弱连接,并将scc中的弱连接进行分裂,实现电路分裂。然后可以通过并行缺陷模拟来实现加速。同时,为了研究先前SCC内部缺陷在后续SCC中的可观察性,根据有向无环图(DAG)中每个SCC之间的单向传递关系对缺陷进行了模拟。提出了一种缺陷与信号在传输过程中的等效压缩方法,减少了缺陷的仿真次数。最后,本文以BANDGAP、LDO和SARADC基准电路为例,通过HSPICE仿真验证了图分割方法的有效性。与最新的晶体管级分路方案相比,本文提出的分路算法可以分割更多更小的电路块。利用电路块划分实现了缺陷并行仿真方案,缺陷转移仿真方案比传统的全电路和全缺陷逐条仿真更有效。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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来源期刊
CiteScore
5.60
自引率
13.80%
发文量
500
审稿时长
7 months
期刊介绍: The purpose of this Transactions is to publish papers of interest to individuals in the area of computer-aided design of integrated circuits and systems composed of analog, digital, mixed-signal, optical, or microwave components. The aids include methods, models, algorithms, and man-machine interfaces for system-level, physical and logical design including: planning, synthesis, partitioning, modeling, simulation, layout, verification, testing, hardware-software co-design and documentation of integrated circuit and system designs of all complexities. Design tools and techniques for evaluating and designing integrated circuits and systems for metrics such as performance, power, reliability, testability, and security are a focus.
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