A Lightweight Modeling and Verification Framework for Programs Over Weak Memory Models in an Algebraic Semantics Style

Abstract

Modeling and verification of multithreaded programs are difficult since one must consider all the ways that instructions in different threads can be interleaved. Modern hardware architectures and mainstream programming languages employ weak memory models (WMMs) for efficiency reasons, and the additional interleavings from them make the modeling and verification more complex. In addition, different WMMs cause various relaxed-memory effects, and their operational semantics has distinguished expressions and transition rules. On this basis, multiple algorithms are required to be designed to conduct verification on programs over WMMs. In this paper, we propose a lightweight modeling and verification framework for programs over WMMs. Above all, we apply Unifying Theories of Programming (UTP) to investigate the unified algebraic semantics. A set of algebraic laws are explored, which can dynamically generate configuration sequences of programs under WMMs. Two memory models, total store order (TSO) implemented in the $\times$86 architecture and SPARC implementations, and ARMv8 supported by the ARM architecture, are used to instantiate the proposed algebraic modeling method. During this process, we record the data state of each configuration and define properties capturing the unique features of the TSO and ARMv8 memory models, and then check whether the properties are satisfied. The algebraic laws are implemented in the rewriting engine Maude, and the verification is also conducted in Maude. The verification results show that the properties all agree with our expectations.