InterKV: Tail Latency Reduction for LSM-Trees in Hybrid Storage Systems

Abstract

The emergence of non-volatile memory (NVM) has introduced new opportunities to enhance the performance of key-value storage systems. However, the high cost of NVM makes its exclusive adoption economically unfeasible. To address this issue, previous research has explored log-structured merge (LSM)-tree split architectures, aiming to achieve cost-effective performance improvements. Nevertheless, these studies often assign the lower levels of the LSM-tree to NVM and the higher levels to low-performance storage devices, which leads to significant compaction overheads at the higher levels and increased tail latency. In this paper, we propose an inter-leaving level placement scheme that maximizes device bandwidth utilization during compaction, thereby enhancing both read and write efficiency. Furthermore, we introduce a speculative read scheme designed specifically for this architecture, which reduces seek waiting overhead and improves random read throughput. Experimental results show that our scheme achieves up to 48.2% performance improvement over state-of-the-art systems.