Fault-free analogue computing with imperfect hardware

Abstract

Memristor-based analogue in-memory computing can compute with physical laws, performing computations directly within memory. However, the inherent susceptibility of analogue systems to device failures and variations limits their precision and reliability, and existing fault-tolerance techniques, including redundancy and retraining, often prove insufficient or impractical for many applications. Here we report a fault-free matrix representation in which any target matrix is decomposed into a product of two adjustable submatrices programmed onto the analogue hardware. This indirect, adaptive representation allows mathematical optimization to bypass faulty devices and simultaneously eliminate differential pairs, enhancing computational density. Our memristor-based system achieves a cosine similarity of over 99.999% for a discrete Fourier transform matrix, despite a 39% device fault rate. Using this method, we also demonstrate a 56-fold bit-error-rate reduction in a wireless communication prototype and improvements of over 194% in density and 164% in energy efficiency in cross-domain benchmarks compared with state-of-the-art techniques on large matrices. The approach is applicable to other emerging memories, as well as non-electrical substrates such as photonic and quantum systems. A matrix representation in which any target matrix is decomposed into the product of two adjustable submatrices allows analogue in-memory computing systems to be immune to hardware faults and increase density.